Improved Noise Margin and Reduced Power Consumption in Subthreshold Adiabatic Logic Using Dual Rail Power Supply

Abstract

Adiabatic logic has been found to be effective in achieving low power in VLSI circuits. In subthreshold region, the circuit conducts a small current and consumes lesser power. In this paper, the dual rail power supply with 0 and 180°phase difference has been used for subthreshold adiabatic logic (SAL). A priority encoder is designed using SAL with dual rail power supply. All the circuit simulations are done using HSPICE simulator at 22 nm PTM technology. In-phase dual supply offers low power consumption, whereas out-phase dual power supply offers an improved noise margin.