2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) 2016
DOI: 10.1109/ipfa.2016.7564253
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Improvement of top-down delayering techniques on advanced technology nodes

Tomáš Hrnčíř
1
,
H. H. Yap
2
,
Efrat Moyal
3
et al.
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