In-field Data Collection System through Logic BIST for large Automotive Systems-on-Chip

Modern embedded nanoelectronic devices, particularly in safety-critical sectors, require high dependability throughout their lifecycle. To address this, designers have started integrating extra circuitry for on-device self-testing, such as the Logic Built-In Self-Test (LBIST). However, while automatic test equipment (ATE) ensures exhaustive testing during manufacturing, in-field testing capabilities are limited. This study introduces a novel methodology for in-field data collection of failure information from LBIST engines and a subsequent logic diagnosis strategy to facilitate failure analysis of field returns. The information is collected from key-on and key-off self-tests, executed by central processing units (CPUs) with a fixed seed and different frequency configurations, primarily addressing transition delay (TRN) faults. The proposed approach capitalizes on the constrained in-field configurability of LBIST and does not require a custom architecture, making it highly practical and readily applicable to real-world devices. The logic diagnosis strategy significantly reduces the number of candidate faults by exploiting the first failing pattern index found during the in-field testing and data collection. Reducing fault candidates could enhance accuracy during failure analysis, especially when field return devices exhibit a “No Trouble Found” (NTF) behavior. The experimental results are reported for ITC’99 benchmarks and an industrial automotive system-on-chip (SoC) produced by STMicroelectronics, with about 20 million gates.

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In-field Data Collection System through Logic BIST for large Automotive Systems-on-Chip

Cited by 3 publications

References 8 publications

Collecting diagnostic information through dichotomic search from Logic BIST of failing in-field automotive SoCs with delay faults

Collecting diagnostic information through dichotomic search from Logic BIST of failing in-field automotive SoCs with delay faults

Advanced Timing Closure by Synopsys Tweaker™

Logic Diagnosis Based on Logic Built-In Self-Test Signatures Collected In-Field from Failing System-on-Chips

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