Interface circuit of sigma-delta accelerometer with on-chip-test function

Abstract

A fifth-order fully differential interface circuit (IC) with onchip-test function is presented to improve the noise performance for micromechanical sigma-delta ('-") accelerometer. The proposed onchip-test technique for '-" accelerometers avoids a shaker table applying a sinusoidal signal as the simulated acceleration which involves distortion itself. An electrostatic force feedback linearization circuit is presented to reduce the harmonic distortion resulting in a larger dynamic range (DR). The post-simulation results show that the electrostatic force feedback linearization circuit decreases the harmonic distortion effectively and the proposed on-chip-test technique achieves 98 dB third-order harmonic distortion detection, and the nonlinearity of the proposed circuit is 0.02%.

A low-distortion ΣΔ capacitive microaccelerometer with self-test circuit

“…The self-test signal V st in can be performed as a input acceleration, and the electrostatic feedback force caused by the self-test signal leads to the displacement of the proof mass, and thus the dynamic performance of the microaccelerometer can be tested. On-chip test circuit presented in [6] achieved a HD3 lower than −100 dB and HD2 lower than −110 dB, respectively. A similar signal is applied to the input of self-test circuit proposed in this work, and the simulation result is shown in Fig.…”

“…The target performance of the proposed microaccelerometer is to achieve a overall noise floor of lower than 10 µg/Hz 1=2 , sensing range of larger than AE1:5 g, low power dissipation of lower than 15 mW, DR of larger than 100 dB and bandwidth of larger than 300 Hz, respectively. Additionally, we want to obtain a self-test circuit with distortion of lower than −90 dB [1,6]. Fig.…”

“…The interface and layout are implemented in a standard CMOS process. A vibration table produces harmonic distortions and decreases measurement resolution, therefore, an on-chip-test technique is proposed in [6] to measure the distortions of the microaccelerometer. However, this on-chip-test circuit is not available for a fully feedforward summation topology in this work due to the large gain of the feedforward path.…”

“…The authors of [4] reports a novel six-order AEÁ closed-loop accelerometer with extended bandwidth in vacuum environment, and a noise acceleration value of 1.2 µg/Hz 1=2 is achieved. Most of the published microaccelerometers employ topologies of distributed feedback or that with feedforward paths [1,3,4,5,6]. These topologies have signal paths bypassing the sensor element, therefore, compensating zeros are determined by feedback coefficients as well as the parameters of sensor, and the position of the zeros are influenced by the variations of sensor's parameters [2].…”

“…In addition, the phase compensator locates before the integrators with improved stability, especially for a high quality factor (Q) sensor element. On-chip-test technique is proposed in [6] to measure the distortions of microaccelerometers without using a vibration table. However, this technique is not available for low-distortion architecture.…”