Investigation of dual work function metal (DWFM) gate stacks with ALD TaAlN and TaAlC for multi threshold voltages (VTHs) engineering in MOS device integration

Choi, Moonsuk; Sim, Jihyeon; Kim, Hyeongjun; Lim, Hyun Jin; Kim, Ki Sub; Choi, Changhwan

doi:10.1016/j.mssp.2024.108352

Materials Science in Semiconductor Processing

2024

DOI: 10.1016/j.mssp.2024.108352

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Investigation of dual work function metal (DWFM) gate stacks with ALD TaAlN and TaAlC for multi threshold voltages (VTHs) engineering in MOS device integration

Moonsuk Choi,

Jihyeon Sim,

Hyeongjun Kim

et al.

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Novel junctionless GAA negative capacitance FET based on gate engineering aspects: analytical modeling and performance assessment

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Novel junctionless GAA negative capacitance FET based on gate engineering aspects: analytical modeling and performance assessment

Rahmani,

Dibi,

Farhati

et al. 2024

J Comput Electron

View full text Add to dashboard Cite

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Investigation of dual work function metal (DWFM) gate stacks with ALD TaAlN and TaAlC for multi threshold voltages (VTHs) engineering in MOS device integration

Cited by 1 publication

References 40 publications

Novel junctionless GAA negative capacitance FET based on gate engineering aspects: analytical modeling and performance assessment

Novel junctionless GAA negative capacitance FET based on gate engineering aspects: analytical modeling and performance assessment

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