IPRAIL—intellectual property reuse-based analog IC layout automation

Jangkrajarng, N.; Bhattacharya, Sambuddha; Hartono, Roy; Shi, C.-J. Richard

doi:10.1016/j.vlsi.2003.08.004

Cited by 56 publications

(15 citation statements)

References 22 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…A template-based generation is used by Intellectual Property Reuse-based Analog IC Layout (IPRAIL) [21] to automatically extract the knowledge embedded in an already made layout, and use it for retargeting. Layout retargeting is the process of generating a layout from an existing layout.…”

Section: Layout Generation Toolsmentioning

confidence: 99%

State of the Art on Analog Layout Automation

Martins¹,

Lourenço²,

Horta³

2012

Generating Analog IC Layouts With LAYGEN II

View full text Add to dashboard Cite

In the past few years, several tools for the automation of the analog integrated circuit (IC) cell and system layout design, with application on both new and reused designs have emerged. Yet, most of the layout design is still handmade, essentially because analog designers want to have total control over the different design options, and also, due to the fact that current fully automated generators of analog IC layouts produce solutions which are not yet competitive with the manually crafted ones. The state-of-the-art on analog layout automation that follows reveals that after many years of stagnation, electronic design automation (EDA) market is evolving, creating more efficient and complementary approaches to the existing tools. The chapter starts by addressing the placement problem in EDA, providing a brief overview of the most recent placement tools developed, followed by the presentation of the main references of automatic layout generation tools, and the recent advances in layout-aware analog synthesis approaches. Finally, the available commercial solutions for analog layout automation are outlined.

show abstract

Section: Layout Generation Toolsmentioning

confidence: 99%

State of the Art on Analog Layout Automation

Martins¹,

Lourenço²,

Horta³

2012

Generating Analog IC Layouts With LAYGEN II

View full text Add to dashboard Cite

show abstract

“…Several works, such as [8], [9], [10] and [11], target the automation of the layout generation of analog circuits.…”

Section: ) the Shallow Trench Isolation (Sti)mentioning

confidence: 99%

A Python-based layout-aware analog design methodology for nanometric technologies

Youssef

Javid

Dupuis

et al. 2011

2011 IEEE 6th International Design and Test Workshop (IDT)

View full text Add to dashboard Cite

Abstract-This paper presents a methodology for procedural layout-aware design for nanometric technologies. A Python-based layout generation tool generates different layout styles for the same basic analog building blocks. Moreover, layout dependent parasitic parameters such as stress effects are easily computed and compared for different layout styles. The procedural layout description is written using a Python API that ensures layout portability over different technologies. A main focus is on how the layout generation tool addresses both geometric and parasiticaware electrical synthesis. This is made possible through an internal loop that links circularly both the sizing phase and the layout generation phase. The proposed design methodology assists the analog designer in exploring electrical and physical trade-offs. At the end, we present synthesis and characterization results that prove the effectiveness and speed of the proposed methodology.

show abstract

“…To get new products to market fast and painlessly, analog layout retargeting has become an attractive research topic in both academia and industry. Jangkrajarng et al developed a CAD tool called IPRAIL [Jangkrajarng et al 2003] to retarget an existing analog layout to new processes. Starting from an already finetuned input layout, IPRAIL first extracts a structural template and then automatically generates the final layout by imposing new device sizes and new design rules on the template.…”

Section: Introductionmentioning

confidence: 99%

Analog layout retargeting using geometric programming

Wang

Xinzhang

Yeh

et al. 2011

ACM Trans. Des. Autom. Electron. Syst.

View full text Add to dashboard Cite

To satisfy the requirements of complex and special analog layout constraints, a new analog layout retargeting method is presented in this article. Our approach uses geometric programming (GP) to achieve new technology design rules, implement device symmetry and matching constraints, and manage parasitics optimization. The GP, a class of nonlinear optimization problem, can be transferred or fitted into a convex optimization problem. Therefore, a global optimum solution can be achieved. Moreover, the GP can address problems with large-scale variables and constraints without setting an initialization variable range. To meet the prerequisites of the GP methodology for analog layout automation, we propose three kinds of mathematical transformations, including negative coefficient transformation, fraction transformation, and maximum of posynomial transformation. The efficiency and effectiveness of the proposed algorithm, as compared with the other existing methods, are demonstrated by a basic case-study example: a two-stage Miller-compensated operational amplifier and a single-ended folded cascode operational amplifier.

show abstract

IPRAIL—intellectual property reuse-based analog IC layout automation

Cited by 56 publications

References 22 publications

State of the Art on Analog Layout Automation

State of the Art on Analog Layout Automation

A Python-based layout-aware analog design methodology for nanometric technologies

Analog layout retargeting using geometric programming

Contact Info

Product

Resources

About