Kinetic properties of TiN thin films prepared by reactive magnetron sputtering

Solovan, M. N.; Брус, В. В.; Maryanchuk, P. D.; Kovalyuk, T. T.; Rappich, Jörg; Gluba, Marc A.

doi:10.1134/s1063783413110255

Cited by 22 publications

(6 citation statements)

References 23 publications

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“…The frontal electric contact to the TiN thin film was prepared by thermal evaporation of indium at the substrate temperature 373 K [8]. Before the back contact was prepared, the back surface of the p-Cd 1−x Zn x Te substrates was treated by the spark method [9] in order to create a p + -layer due to additionally generated cadmium vacancies on the back surface.…”

Section: Experimental Partmentioning

confidence: 99%

Temperature dependent electrical properties and barrier parameters of photosensitive heterojunctions n-TіN/p-Cd_1−xZn_xTe

Solovan

Брус

Maryanchuk

et al. 2015

Semicond. Sci. Technol.

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Photosensitive heterojunctions n-TiN/p-Cd 1−x Zn x Te were fabricated by the deposition of titanium nitride thin films by means of dc reactive magnetron sputtering onto cleaved single crystal substrates Cd 1−x Zn x Te with p-type conductivity. We investigated the temperature dependence of the height of the potential barrier and the series resistance of the n-TiN/p-Cd 1 −x Zn x Te heterojunctions. The dominating current transport mechanisms through the heterojunctions at forward and reverse bias were determined. The n-TiN/p-Cd 1−x Zn x Te heterojunctions possessed a significantly higher value open circuit voltage V oc = 0.65 V compared to the open circuit voltage V oc = 0.35 V of the n-TiN/p-CdTe heterojunctions under the same illumination conditions [Solovan et al 2014 Semicon. Sci. Technol. 29 015007].

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Section: Experimental Partmentioning

confidence: 99%

Temperature dependent electrical properties and barrier parameters of photosensitive heterojunctions n-TіN/p-Cd_1−xZn_xTe

Solovan

Брус

Maryanchuk

et al. 2015

Semicond. Sci. Technol.

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“…The inset in figure 1(a) shows the elemental composition of the front surface of the n-TiN/p-CdTe heterojunction, which is well correlated with the chemical composition of the components of the heterojunction. Oxygen is the background impurity in the TiN thin film [20]. It is seen from the SEM image of the cross-section that the thickness of the TiN thin film is equal to 100 nm.…”

Section: Morphology and Structural Propertiesmentioning

confidence: 99%

Fabrication and characterization of anisotype heterojunctions n-TiN/p-CdTe

Solovan

Брус

Maryanchuk

et al. 2013

Semicond. Sci. Technol.

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Photosensitive heterojunctions n-TiN/p-CdTe were fabricated for the first time by means of titanium nitride thin film deposition (n-type conductivity) by the reactive magnetron sputtering onto freshly etched single crystal substrates CdTe (1 1 0) of p-type conductivity. The temperature dependences of the height of the potential barrier and series resistance of the n-TiN/p-CdTe heterojunction were investigated. The dominating current transport mechanisms through the heterojunctions under investigation were determined at forward and reverse bias. The heterojunctions under investigation generate open-circuit voltage V oc = 0.35 V, short-circuit current I sc = 1.88 mA sm −2 and fill factor FF = 0.51 under illumination 80 mW sm −2 .

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“…The reliance of the mechanical and electrical properties of titanium nitride thin films deposited with the help of variety of techniques upon silicon substrates have been studied in past to exhibit their potential for CMOS industry driven applications [ 2 ]. In some previous studies [ 3 – 4 ], the TiN-Si hetrojunctions were fabricated by the deposition of TiN thin films onto the refined Si substrates by using the DC reactive magnetron sputtering. These nitrides have also shown to exhibit the property to tune the work function due to their thermal stability [ 5 ].…”

Section: Introductionmentioning

confidence: 99%

Effect of Thermal Budget on the Electrical Characterization of Atomic Layer Deposited HfSiO/TiN Gate Stack MOSCAP Structure

2016

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Metal Oxide Semiconductor (MOS) capacitors (MOSCAP) have been instrumental in making CMOS nano-electronics realized for back-to-back technology nodes. High-k gate stacks including the desirable metal gate processing and its integration into CMOS technology remain an active research area projecting the solution to address the requirements of technology roadmaps. Screening, selection and deposition of high-k gate dielectrics, post-deposition thermal processing, choice of metal gate structure and its post-metal deposition annealing are important parameters to optimize the process and possibly address the energy efficiency of CMOS electronics at nano scales. Atomic layer deposition technique is used throughout this work because of its known deposition kinetics resulting in excellent electrical properties and conformal structure of the device. The dynamics of annealing greatly influence the electrical properties of the gate stack and consequently the reliability of the process as well as manufacturable device. Again, the choice of the annealing technique (migration of thermal flux into the layer), time-temperature cycle and sequence are key parameters influencing the device’s output characteristics. This work presents a careful selection of annealing process parameters to provide sufficient thermal budget to Si MOSCAP with atomic layer deposited HfSiO high-k gate dielectric and TiN gate metal. The post-process annealing temperatures in the range of 600°C -1000°C with rapid dwell time provide a better trade-off between the desirable performance of Capacitance-Voltage hysteresis and the leakage current. The defect dynamics is thought to be responsible for the evolution of electrical characteristics in this Si MOSCAP structure specifically designed to tune the trade-off at low frequency for device application.

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Kinetic properties of TiN thin films prepared by reactive magnetron sputtering

Cited by 22 publications

References 23 publications

Temperature dependent electrical properties and barrier parameters of photosensitive heterojunctions n-TіN/p-Cd_1−xZn_xTe

Temperature dependent electrical properties and barrier parameters of photosensitive heterojunctions n-TіN/p-Cd_1−xZn_xTe

Fabrication and characterization of anisotype heterojunctions n-TiN/p-CdTe

Effect of Thermal Budget on the Electrical Characterization of Atomic Layer Deposited HfSiO/TiN Gate Stack MOSCAP Structure

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Kinetic properties of TiN thin films prepared by reactive magnetron sputtering

Cited by 22 publications

References 23 publications

Temperature dependent electrical properties and barrier parameters of photosensitive heterojunctions n-TіN/p-Cd1−xZnxTe

Temperature dependent electrical properties and barrier parameters of photosensitive heterojunctions n-TіN/p-Cd1−xZnxTe

Fabrication and characterization of anisotype heterojunctions n-TiN/p-CdTe

Effect of Thermal Budget on the Electrical Characterization of Atomic Layer Deposited HfSiO/TiN Gate Stack MOSCAP Structure

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Temperature dependent electrical properties and barrier parameters of photosensitive heterojunctions n-TіN/p-Cd_1−xZn_xTe

Temperature dependent electrical properties and barrier parameters of photosensitive heterojunctions n-TіN/p-Cd_1−xZn_xTe