Lightweight Hardware Architectures for the Present Cipher in FPGA

Lara-Nino, Carlos Andres; Díaz-Pérez, Arturo; Morales-Sandoval, Miguel

doi:10.1109/tcsi.2017.2686783

Cited by 100 publications

(59 citation statements)

References 25 publications

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“…Lara-Nino, et al [16] proposed PRESENT lightweight hardware cipher architecture implemented on FPGA platform. In this study, two alternatives have been studied to generate the round key needed by algorithm.…”

Section: Literature Surveymentioning

confidence: 99%

Lorentz Chaotic System key generation with Low Area FPGA Implementation using Present Security Algorithm

Parikibandla¹,

Sreenivas²

2019

IJRTE

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Recently, the study of lightweight symmetric ciphers has gained more importance because of high requirement in the services for security in the CCNs (Constrained Computing Environments): Wireless Sensor Network (WSN), Internet of Things (IoT). A lightweight cipher is a cryptographic algorithm which is used for low resource device, minimal area optimization, low power design and attains sufficient security level. Size of the key is considered as major challenges in the cryptographic algorithms, because it increases the complexity of the cryptographic algorithm. To overcome this issue and improve the security, Lorentz Chaotic System (LCS) based PRESENT architecture is introduced in this research. The PRESENT lightweight block cipher is selected due to it is most general and famous lightweight algorithms. Hence, the random numbers were generated for a key purpose by using an LCS circuit. The streaming data will be encrypt and decrypt by using this algorithm. In this research, the modified lightweight block cipher algorithm is called as LCS-PRESENT architecture. Finally, the performance of LCS -PRESENT architecture was evaluated by FPGA hardware utilizations such as Lookup Table (LUT), flip flop, slices, and frequency. The security level of LCS-PRESENT architecture was analysed based on encrypted and decrypted results in XILINX tool. The LCS-PRESENT architecture utilizes the FPGA device to attain maximum accuracy and throughput, such as 30 of LUTs, 115 of flip flops and 47 of slices from available sources compared to existing cryptographic algorithms.

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Section: Literature Surveymentioning

confidence: 99%

Lorentz Chaotic System key generation with Low Area FPGA Implementation using Present Security Algorithm

Parikibandla¹,

Sreenivas²

2019

IJRTE

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“…They have designed two architectures with 16-bits datapath in each by varying the key sizes of 128-bits and 80-bits. PRESENT cipher is considered an ultra-lightweight block cipher among all lightweight ciphers having sufficient security features [22]. Therefore, most of authors have made changes in the hardware implementations of PRESENT cipher.…”

Section: A Related Workmentioning

confidence: 99%

Energy-Efficient and High-throughput Implementations of Lightweight Block Cipher

2019

IJITEE

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Security in resource-constrained devices has drawn the great attentions to researchers in recent years. To make secure transmission of critical information in such devices, lightweight cryptography algorithms come in light to large extend. KLEIN has been popular lightweight block cipher used to overcome such issues. In this paper, different architectures of KLEIN block cipher are presented. One of designs enhances the efficiency with regard to the throughput at the expense of a larger area. In order to make such designs, the pipelined registers are placed on different positions in datapath algorithm. The proposed design transforms the data input to protected output with the speed of 2414.13 Mbps for xc5vlx50t-3ff1136 device. In addition, the second design implementation completes either one or more than one round in only one clock and gives energy-efficient and high throughput implementations. Due to this, a trade-off between area and speed can be analyzed for high-speed applications. Moreover, this proposed design shows that with increasing the area of cipher implementation results in more transformation of plaintext into ciphertext. All results are verified and simulated for various families of Xilinx ISE design suite.

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“…To create a lightweight cipher it is necessary to use less shows the high performance architecture of lightweight block cipher LEA with 192 bit key size, which has increased area and less number of rounds. Some of the Lightweight cryptography algorithms are like PRESENT [5], Piccolo [6], LEA [2], LiCi [7], QTL [8], KATAN KATANTAN [9] etc.…”

Section: Introductionmentioning

confidence: 99%

LEA 192: High Speed Architecture of Lightweight Block Cipher

2019

IJITEE

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High-throughput lightweight cryptography calculation is the need of the present world to convey between two asset obliged devices Pipelining is the technique have been used to achieve high throughput. In this paper we have target to lightweight block cipher LEA. Block size of LEA is 128 and key size 128, 192, and 256 bit. In this paper we have focus on LEA architecture for 192- bit key size and achieve very good throughput. This method has a higher capability of throughput as compared to previous LEA ciphers. Proposed work is 56% improved version of compared paper for respective Speed and area also less than previous architecture. Graph representation have been shown of different matrices and comparison.

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Lightweight Hardware Architectures for the Present Cipher in FPGA

Cited by 100 publications

References 25 publications

Lorentz Chaotic System key generation with Low Area FPGA Implementation using Present Security Algorithm

Lorentz Chaotic System key generation with Low Area FPGA Implementation using Present Security Algorithm

Energy-Efficient and High-throughput Implementations of Lightweight Block Cipher

LEA 192: High Speed Architecture of Lightweight Block Cipher

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