Line-Edge Roughness from Extreme Ultraviolet Lithography to Fin-Field-Effect-Transistor: Computational Study

Kim, Sang-Kon

doi:10.3390/mi12121493

Cited by 11 publications

(10 citation statements)

References 48 publications

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“…As predicted by Moore’s Law, the density of integrated circuits (ICs) has been improved exponentially for high-performance semiconductor devices and the photolithographic fabrication of nanoscale semiconductor devices requires increasingly high-resolution techniques. , Extreme ultraviolet lithography (EUVL) and electron beam lithography (EBL) are key advanced lithographic technologies for the production of feature sizes lower than 20 nm. − As the feature size decreases, the requirements for resists’ performance have gradually increased. It is still a great challenge to develop resist materials fulfilling all the requirements for advanced lithography such as high resolution (R) and sensitivity (S), low line edge roughness (LER), high etching resistance, and low outgassing. − The traditional polymeric materials are unfavorable for achieving high-resolution lithographic patterns with low LER due to their characteristics, such as polydispersity, large molecular size, chain entanglement, and poor compatibility with photoacid generators (PAGs). − …”

Section: Introductionmentioning

confidence: 99%

Molecular Glass Resists Based on Tetraphenylsilane Derivatives: Effect of Protecting Ratios on Advanced Lithography

et al. 2022

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A series of t -butyloxycarbonyl ( t -Boc) protected tetraphenylsilane derivatives (TPSi-Boc x , x = 60, 70, 85, 100%) were synthesized and used as resist materials to investigate the effect of t -Boc protecting ratio on advanced lithography. The physical properties such as solubility, film-forming ability, and thermal stability of TPSi-Boc x were examined to assess the suitability for application as candidates for positive-tone molecular glass resist materials. The effects of t -Boc protecting ratio had been studied in detail by electron beam lithography. The results suggest that the TPSi-Boc x resist with different t -Boc protecting ratios exhibit a significant change in contrast, pattern blur, and the density of bridge defect. The TPSi-Boc 70% resist achieves the most excellent patterning capability. The extreme ultraviolet (EUV) lithography performance on TPSi-Boc 70% was evaluated by using the soft X-ray interference lithography. The results demonstrate that the TPSi-Boc 70% resist can achieve excellent patterning capability down to 20 nm isolated lines at 8.7 mJ/cm 2 and 25 nm dense lines at 14.5 mJ/cm 2 . This study will help us to understand the relationship between the t -Boc protecting ratio and the patterning ability and supply useful guidelines for designing molecular resists.

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Section: Introductionmentioning

confidence: 99%

Molecular Glass Resists Based on Tetraphenylsilane Derivatives: Effect of Protecting Ratios on Advanced Lithography

et al. 2022

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“…Indubitably, LER/LWR is the most critical parameter of the high-resolution line patterns for advanced nodes, because the higher magnitude of LER and LWR may be lead to the logic and DRAM ICs chip failures, for instance, variability in the threshold voltage (Vth), higher leakage current, and variation in off-state leakage current, etc 55 , 56 . As per the International Roadmap for Devices and Systems (IRDS) roadmap for RLS trade-off, the LER budget is ∼10% of the critical dimension 1 .…”

Section: Resultsmentioning

confidence: 99%

“…Thus, a resist comprised of the entities of a higher absorption cross-section (α) will require a lower EUV exposure dose, at constant D. Indubitably, LER/LWR is the most critical parameter of the high-resolution line patterns for advanced nodes, because the higher magnitude of LER and LWR may be lead to the logic and DRAM ICs chip failures, for instance, variability in the threshold voltage (V th ), higher leakage current, and variation in off-state leakage current, etc. 55,56 As per the International Roadmap for Devices and Systems (IRDS) roadmap for RLS trade-off, the LER budget is ∼10% of the critical dimension. 1 In that context, the calculated LER and LWR of the l/s patterns generated over In-MAA resist after h-NA (0.5), EUV exposure for ∼50 nm (l/s) line features are 2.36 AE 0.16 and 5.81 AE 0.3 nm, respectively, which is linearly degraded with the width of L/S line patterns as shown in Fig.…”

Section: High-na Extreme Ultraviolet Exposure and Sensitivity Evaluationmentioning

confidence: 99%

Ultrasensitive metal-organic cluster resist for patterning of single exposure high numerical aperture extreme ultraviolet lithography applications

Chauhan

Palit

Choudhary

et al. 2022

J. Micro/Nanopattern. Mats. Metro.

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Background: An incredible increase in the integration of electronic chips has pushed the semicon industries to endorse high numerical aperture (h-NA ∼ 0.5), extreme-ultraviolet (EUV) lithography (EUVL) (λ ∼ 13.5 nm) at the commercial scale. Induction of h-NA postulates EUV resists that could outperform the resolution, line pattern roughness, and sensitivity (RLS) tradeoff for chip fabricators, which is currently extremely limited. Aim:The development of EUV resist to balance RLS trade-off as well as overcome throughput limitations of h-NA EUV system to facilitate high volume semiconductor manufacturing.Approach: Here, we developed indium-methacrylic acid-based metal-organic clusters resist for h-NA, EUVL. To examine the h-NA single exposure patterning potential of the resist, prescreening by sub-10 nm next-generation lithography (NGL) tools such as electron beam lithography (EBL), and helium ion beam lithography (HIBL) were conducted as a prelude to EUV exposure.Results: Dense ∼13 nm, (l/s) patterns at ∼45 and ∼30 μC∕cm 2 were well resolved by EBL and HIBL, on the top this the line edge roughness (LER) was 2.48 AE 0.04 nm, and etch resistance ∼1.98 and ∼0.34 times lower than Si and SiO 2 ∕Si systems. Also, In-MAA MOCs resist shows ultra-sensitivity of 2.3 mJ∕cm 2 towards h-NA EUVL for patterning up to 26 nm half-pitch line patterns with LER ∼2.36 AE 0.16 nm.

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“…While the industry put a lot of effort into understanding, characterizing, and mitigating the impact of stochastic effects in 0.33 NA EUV lithography [3][4][5][6][7], the focus is shifting to 0.55 NA high NA EUV which is planned for introduction beyond the sub-3nm technology node. Here, stochastic effects are expected to play an even more significant role, including their impact on device performance [8,9].…”

Section: Introductionmentioning

confidence: 99%

Electrical analysis of a stochastically simulated 2 nm node electrical test structure

Melvin¹,

Demmerle

Siebert

et al. 2023

DTCO and Computational Patterning II

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Integrated circuit performance has been limited by transistor performance for many process nodes. However, in advanced nodes where pitches reach 10s of nanometers in size, there is an increasing probability of cases where circuit timing may be limited by the resistance and capacitance of the device rather than the transistor. This means that metal layer patterning may have implications on device performance beyond reliability, shorts, and opens. Lithography variation can be effectively predicted using stochastic simulations, including layer overlay. Simulating many patterns stochastically produces insight into the performance of the lithography process over time. Etching and metallizing the pattern set in simulation then allows the study to extend to electrical simulations. The combined lithography and electrical simulation data can then be used together to improve process or pattern performance before constructing a reticle. These data also allow the engineering teams to address resist and capacitance issues that may impact device performance prior to tapeout. This paper will investigate the metal layers of a structure designed to emulate an advanced node logic circuit that uses a CFET transistor. The structure will be corrected with OPC, and each layer will be simulated to generate a large (100) set of stochastic patterns at multiple process conditions in focus, overlay, and exposure. Each of these patterns will then be etched in a modeled process and metalized with copper. Finally, resistance and capacitance measurements will be generated from circuit simulations. The output data will then be used to update the lithography process or the pattern to improve through process performance including electrical characteristics.

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Line-Edge Roughness from Extreme Ultraviolet Lithography to Fin-Field-Effect-Transistor: Computational Study

Cited by 11 publications

References 48 publications

Molecular Glass Resists Based on Tetraphenylsilane Derivatives: Effect of Protecting Ratios on Advanced Lithography

Molecular Glass Resists Based on Tetraphenylsilane Derivatives: Effect of Protecting Ratios on Advanced Lithography

Ultrasensitive metal-organic cluster resist for patterning of single exposure high numerical aperture extreme ultraviolet lithography applications

Electrical analysis of a stochastically simulated 2 nm node electrical test structure

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