Linear MIMO equalization for high-speed chip-to-chip communication

Abstract

Abstract-In this contribution, we present a linear multiple-input multiple-output (MIMO) equalization scheme at the receiver side for high-speed electrical chip-tochip communication. As opposed to traditional single-input single-output (SISO) equalization per lane, this MIMO approach enables cooperating receivers to treat crosstalk (XT) between neighboring channels as an informationbearing signal instead of a disturbing signal, allowing to mitigate both inter symbol interference and XT. Given a simulated 4 × 4 MIMO electrical chip-to-chip interconnect channel, we point out that, for a given total number of equalizer taps, MIMO equalization can outperform SISO equalization. Moreover, by further increasing the total number of equalizer taps, MIMO equalization allows to obtain performance gains that are substantially larger than for SISO equalization.

MIMO pre-equalization and DFE for high-speed off-chip communication

“…We consider both the proposed pre-equalization scheme combined with DFE at the receiver side as well as a linear preequalization scheme without DFE (L FB = 0). In addition, we show the MSE performance resulting from the linear MIMO post-equalization scheme at the receiver (Rx) side from [10] and the DFE scheme at the receiver side from [11]; in the latter two schemes, upsampling at the transmitter (N pr = 2) is replaced by oversampling at the receiver (N po = 2). It is observed from Fig.…”

“…In [9], multiple-input multiple-output (MIMO) pre-equalization using THP was proposed to improve the reliability of 10 Gbps Ethernet over UTP cables, also known as 10GBASE-T. However, also on electrical chip-to-chip interconnects, XT can be put to good use by applying linear MIMO equalization at the receiver side, as shown in [10]. These results were further improved in [11] by applying DFE.…”

Application of MIMO DF equalization to high-speed off-chip communication

“…1 degenerates to a conventional SISO DFE scheme. When all feedback filters have zero coefficients, the MIMO DFE scheme reduces to the linear MIMO equalization scheme from [9]. It should be noted that the analog front end of the proposed MIMO equalization scheme is identical to the one in the case of traditional SISO equalization.…”

“…Taking (14) into account, and considering the resulting similarity between (12) and [9,Eq. (12)], the minimum mean square error (MMSE) feedforward equalization matrix H FF,MMSE minimizing the MSE between the actual output vector u(k) and the target output vector a(k) can be shown to be elegantly expressed as…”

“…In order to mitigate XT, a myriad of XT cancellation techniques have been proposed such as analog front-end design with infinite impulse response (IIR) networks [5], proper printed circuit board (PCB) design [6], capacitive crosstalk compensation [7], and wavelet based filtering [8]. In [9], it was shown that linear multiple-input multiple-output (MIMO) equalization is able to significantly outperform conventional single-input singleoutput (SISO) equalization by exploiting the XT signals rather than suppressing them.…”