Linearized CMOS Darlington Feedback Amplifier for Wireless Communications

Abstract

In this paper, the design of a fully-integrated CMOS Darlington feedback amplifier incorporating multiple-gated transistor linearization is presented. Simulation results have yielded a peak S21 power gain of 10.3 dB and a unity gain bandwidth of 16 GHz with better than -10 dB S11. The simulation results show a 7 dB IIP3 improvement and IM3 improvement of 18 dBc at output power of -10 dBm. The proposed linearized Darlington feedback amplifier was designed using the 0.13µm CMOS technology.