2011 IEEE International Test Conference 2011
DOI: 10.1109/test.2011.6139152
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Lithography aware critical area estimation and yield analysis

Priyamvada Vijayakumar
1
,
Vikram Suresh
2
,
Sandip Kundu
3
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Cited by 10 publications
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References 30 publications
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Short critical area model and extraction algorithm based on defect characteristics in integrated circuits

Wang
1
,
Wu
2
,
Zhao
3
2016
Analog Integr Circ Sig Process
3
0
1
0
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Short critical area model and extraction algorithm based on defect characteristics in integrated circuits

Wang
1
,
Wu
2
,
Zhao
3
2016
Analog Integr Circ Sig Process
3
0
1
0
View full textAdd to dashboardCite

Lithography-friendly analog layout migration

Xuan
1
,
Zhang
2
2015
2015 IEEE International Symposium on Circuits and Systems (ISCAS)
3
0
0
0
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Advanced nanometer technology analog layout retargeting for lithography friendly design

Xuan
1
,
Zhang
2
2016
2016 IEEE International Symposium on Circuits and Systems (ISCAS)
2
0
0
0
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