Low Area FPGA Implementation of PRNG-LCC-CSLA Architecture Based on Chaotic Circuit

Abstract

In the present days, internet communication is adapting data hiding and cryptography that often needs billions of pseudo random numbers. The Pseudo Random Number Generator (PRNG) is used to fulfill privacy and security needs in most of the applications. In this paper, the PRNG using Lorenz Chaotic Circuit with Carry Select Adder (PRNG-LCC-CSLA) method used to generate the pseudo random numbers. The LCC implemented by using Verilog to generate the pseudo random numbers, and randomness of the LCC results also checked in National Institute of Standards Technology (NIST) testing scheme. Encryption process is implemented by employing binary value of both text and image. Decryption process is implemented by employing same LCC binary value of encrypted data. At last, the Matlab is used to observe the text and image data. The Field Programmable Gate Array (FPGA) results showed how Look Up Table (LUT), slice, flip-flop and frequency improved and Application Specific Integrated Circuit (ASIC) results showed area, power, delay, Area Power Product (APP) and Area Delay Product (ADP) improvements in the PRNG-LCC-CSLA method compared to the existing methods.