Low power design and validation of address generator circuits using GDI method at CMOS 16nm PTM technology

Reddy, P. Ravi Kumar; Sudhakar, B.

doi:10.1063/5.0224466

AIP Conference Proceedings

2024

DOI: 10.1063/5.0224466

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Low power design and validation of address generator circuits using GDI method at CMOS 16nm PTM technology

P. Ravi Kumar Reddy,

B. Sudhakar

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Low power design and validation of address generator circuits using GDI method at CMOS 16nm PTM technology

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References 7 publications

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