Low-Power FIR Filter Design Using Hybrid Artificial Bee Colony Algorithm with Experimental Validation Over FPGA

Dwivedi, Atul Kumar; Ghosh, Subhojit; Londhe, Narendra D.

doi:10.1007/s00034-016-0297-4

Cited by 24 publications

(9 citation statements)

References 32 publications

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“…However, BCT has some limitations such as lack of secondary information, requires new fitness tests, increase the possibility of losing relevant information, slowdown in sequential processing, especially in the vicinity of the final solution, thus leading to high computational cost. Although NMSS technique is simple, fast convergence, low execution time, required few control parameters, frequently gets trapped into local optima, and its convergence is excessively sensitive to initial seed value of variables [26]. The individual drawbacks of local search and an evolutionary technique can be excluded by employing the local search technique followed by the convergence of the evolutionary technique [34].…”

Section: Need Of Hybridizationmentioning

confidence: 99%

“…BCT technique is an adjustable and powerful technique than earlier used swarm intelligence techniques [25], because it is inspired by the natural phenomenon and requires only one parameter to control its operation. Its implementation is easy because of having a natural search behaviour [26]. It is used in number of applications such as benchmarking optimization [27], scheduling application [28], clustering and mining application [29].…”

Section: Introductionmentioning

confidence: 99%

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Quadrature mirror filter bank design based on hybrid bee colony technique

2021

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This paper proposed a modified evolutionary technique formed by the hybridization of the bee colony technique and Nelder-Mead Simplex search technique to optimize the coefficients of Quadrature Mirror Filter (QMF). The performance of QMF can be evaluated in terms of error in the pass-band, stop-band and measure of ripple. A modified objective function is designed in this work, expressed as a weighted sum of errors in the pass-band, stop-band and measure of ripple. A modified objective function is minimized by using the proposed technique. The results obtained from the proposed technique are compared with the previously reported evolutionary optimization techniques based on QMF design. A significant improvement in various performance attributes has been attained compared to earlier reported QMF bank design techniques.

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Section: Need Of Hybridizationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Quadrature mirror filter bank design based on hybrid bee colony technique

2021

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“…Atul Kumar et al [15] proposed a low power FIR filter design, which is implemented based on Hybrid Artificial Bee Colony (HABC) to reduce switched power consumption. It provides faster convergence than a conventional ant bee colony.…”

Section: Literature Workmentioning

confidence: 99%

High-Speed FIR Filter Design using Decision Tree Algorithm with FPGA Debugging

Anumothu*,

Harikishore

2020

IJITEE

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In recent years, the filter is one of the key elements in signal processing applications to remove unwanted information. However, traditional FIR filters have been consumed more resources due to complex multiplier design. Mostly the complexity of the FIR filter is dominated by multiplier design. The conventional multipliers can be realized by Single Constant Multiplication (SCM) and Multiple Constant Multiplication (MCM) algorithms using shift and add/subtract operations. In this paper, a hybrid state decision tree algorithm is introduced to reduce hardware utilization (area) and increase speed in filter tap cells of FIR. The proposed scheme generates a decision tree to perform shift & addition and accumulation based on the combined SCM/MCM approach. The proposed FIR filter was implemented in Xilinx Field Programmable Gate Array (FPGA) platform by using Verilog language. The experimental results of the DTG-FIR filter were averagely reduced the 48.259% of LUTs, 51.567 % of flip flops and 44.497 % of slices at 183.122 MHz of operating frequency on the Virtex-5 than existing VP-FIR.

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“…Various techniques have been developed to decrease the hardware implementation complexity [9], [11]- [24] of a traditional FIR filter. The popular ones of these techniques include sparse traditional FIR filter technique [12], [13], [18], [20], frequency response mask technique [8], and the matrix decomposition based technique [7].…”

Section: Introductionmentioning

confidence: 99%

A Theoretical Question in the Optimal Design of Matrix Decomposition Based FIR Filter

et al. 2020

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The matrix decomposition (MD) based finite impulse response (FIR) filter is a low-complexity FIR filter. It has been tested the coefficients of the MD-FIR filter can be effectively optimized by the trustregion-iterative-gradient-searching (TR-IGS) algorithm. This algorithm solves the convex-approximationproblem of the original coefficients optimization problem. In this study, we deal with the relationship between the theoretical termination point of the TR-IGS and the optimal solution of the original coefficients optimization problem.

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Low-Power FIR Filter Design Using Hybrid Artificial Bee Colony Algorithm with Experimental Validation Over FPGA

Cited by 24 publications

References 32 publications

Quadrature mirror filter bank design based on hybrid bee colony technique

Quadrature mirror filter bank design based on hybrid bee colony technique

High-Speed FIR Filter Design using Decision Tree Algorithm with FPGA Debugging

A Theoretical Question in the Optimal Design of Matrix Decomposition Based FIR Filter

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