Extended Abstracts of the 1992 International Conference on Solid State Devices and Materials 1992
DOI: 10.7567/ssdm.1992.pd3-4
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Low-Temperature Furnace-Annealed Aluminum-Gate MOSFET for Ultra-High-Speed Integrated Circuits

Abstract: Arsenic-implanted self-aligned Al-gate MOSFETs have been successfully fabricated by employing ultra-clean ion implantation technology. The use of ultra high vacuum ion implanter and the suppression of the high-energy-beam-induced metal sputter contamination have enabled us to form low-leakage pn junctions by fumace arurealing at a temperature as low as 450"C. The fabricated Al-gate MOSFETs have exhibited good electrical characteristics, thus demonstratiDg a large poteDtial for application to realizing ultra-hi… Show more

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“…This will allow us to use lowresistivity metals more abundantly in the heart of device structures, leading to great speed enhancement of scaled devices. 1,2 For instance, ultrahigh-speed integrated circuits having the metal-substrate-metal-gate silicon-on-insulator ͑SOI͒ complementary metal-oxide-semiconductor ͑CMOS͒ structure, which is expected to operate at a clock rate as high as 10 GHz, 1,2 would become possible.…”
Section: Introductionmentioning
confidence: 99%
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“…This will allow us to use lowresistivity metals more abundantly in the heart of device structures, leading to great speed enhancement of scaled devices. 1,2 For instance, ultrahigh-speed integrated circuits having the metal-substrate-metal-gate silicon-on-insulator ͑SOI͒ complementary metal-oxide-semiconductor ͑CMOS͒ structure, which is expected to operate at a clock rate as high as 10 GHz, 1,2 would become possible.…”
Section: Introductionmentioning
confidence: 99%
“…Some of the EOR defects, such as large dislocation loops, can be reduced by eliminating contaminants introduced into the junction during the ion implantation, e.g., residual gas molecules which are adsorbed on the wafer surface and then recoil implanted into the substrate, 11 the oxygen recoil from screen oxides, 2,11 and the metal contami-nation caused by high-energy ion-beam sputtering of metal components installed in the ion implanter. 12,13 These contaminants act as nucleation sites for dislocation loop formation during SPE in the postimplantation annealing.…”
Section: Introductionmentioning
confidence: 99%
“…In situ doped silicon epitaxy at 250°C (11) and large grain copper interconnection technology with high electromigration resistance (12) are examples. The formation of ultra-shallow pn junctions by ultraclean ion implantation technology has allowed us to fabricate self-aligned aluminum-gate MOSFET at 450°C (13),…”
mentioning
confidence: 99%