Low voltage Delta-Sigma Modulator with full range and unidirectional output

Abstract

In the conventional second order, single bit, discrete ΔΣ Modulator (DSM), the sampling of input signal and DSM operation is performed at the same frequency. In this conventional DSM, signal to noise ratio (SNR) starts falling down rapidly when the modulus of normalized input signal is above 0.47. The integrators output become arbitrarily large which make the system unstable by saturating the operational amplifiers used in the circuit. There are recent papers in which the modulus of normalized input signal can be increased up to 0.7. In the present paper, a second order DSM with different sampling frequency and DSM clock frequency is proposed. The operating period of the proposed DSM is proportional to the sampled analog input signal. The proposed DSM can operate for the full range of normalized input signal (−1 to +1), has better signal to noise ratio (SNR) in the higher range and can be realized using cmos circuit of supply voltage ²1.5 V. The maximum bound on the integrators outputs is 1.5 V. The proposed DSM has unidirectional output and the oscillation at the output for zero input is no longer present and these properties are essential to drive stepper motors which are the actuators for control valves in industry. In the output spectrum near the signal frequency, the noise level is well below the signal level. The proposed DSM results in low power, stable full range operation with better SNR and power spectral density (PSD).

A 2.5-Vpp PVT-insensitive high dynamic range output stage using bulk voltages adjustment

“…This improvement makes sense in a high-resolution ADC [7,8]. What's more, the high output range facilitates high-quality signals in applications like SC filters [9,10], modulators [11,12,13,14], and et al [15,16,17]. However, as the supply voltage scales down, achieving a high output range becomes difficult [18,19,20].…”

A Low Power Sigma-Delta Modulator with Hybrid Architecture

“…An ADC of this structure can reduce the quantization noise in the required signal frequency band through noise shaping and oversampling technology, improving the analogue-to-digital converter signal to noise distortion ratio (SNDR). At the same time, due to the use of a SAR quantizer, the modulator power consumption is also reduced compared with the traditional sigma-delta modulator [ 12 ].…”