Measurement based chip impedance determination on validation board

Abstract

In this paper, a simple and robust methodology for chip impedance determination by de-embedding transition is proposed and described. The methodology is solely based on measurement with no dependency on 3D Electro-Magnetic simulator. The proposed method has been verified by measuring chip impedance of a radio operating at 2.45 GHz. The measured chip impedance from the proposed methodology matches reasonably close to the simulated impedance obtained from chip designer for most practical applications. The impedance error in the proposed measurement based methodology is within 15 %, with magnitude error being 13.7 % and phase error of 12.2 %. Keywords-Chip impedance, de-embedding, scattering parameter (S parameter), vector network analyzer (VNA)I.