Clustering large numbers of data points is a very computationally demanding task that often needs to be accelerated in order to be useful in practical applications. This work focuses on the Density-Based Spatial Clustering of Applications with Noise (DBSCAN) algorithm, which is one of the state-of-the-art clustering algorithms, targeting its acceleration using an FPGA device. The paper presents an, optimised, scalable and parameterisable architecture that takes advantage of the internal memory structure of modern FPGAs in order to deliver a high performance clustering system. Post-synthesis simulation results show that the developed system can obtain mean speed-ups of 31x in real-world tests and 202x in synthetic tests when compared to state-of-the-art software counterparts running on a quad-core 3.4 GHz Intel i7-2600k. Additionally, this implementation is also capable of clustering data with any number of dimensions without impacting the performance.