Metastability-Containing Circuits

Abstract

In digital circuits, metastability can cause deteriorated signals that neither are logical 0 or logical 1, breaking the abstraction of Boolean logic. Unfortunately, any way of reading a signal from an unsynchronized clock domain or performing an analog-to-digital conversion incurs the risk of a metastable upset; no digital circuit can deterministically avoid, resolve, or detect metastability (Marino, 1981). Synchronizers, the only traditional countermeasure, exponentially decrease the odds of maintained metastability over time. Trading synchronization delay for an increased probability to resolve metastability to logical 0 or 1, they do not guarantee success.We propose a fundamentally different approach: It is possible to contain metastability by finegrained logical masking so that it cannot infect the entire circuit. This technique guarantees a limited degree of metastability in -and uncertainty about -the output.At the heart of our approach lies a time-and value-discrete model for metastability in synchronous clocked digital circuits. Metastability is propagated in a worst-case fashion, allowing to derive deterministic guarantees, without and unlike synchronizers. The proposed model permits positive results and passes the test of reproducing Marino's impossibility results. We fully classify which functions can be computed by circuits with standard registers. Regarding masking registers, we show that they become computationally strictly more powerful with each clock cycle, resulting in a non-trivial hierarchy of computable functions.Demonstrating the applicability of our approach, we present the first fault-tolerant distributed clock synchronization algorithm that deterministically guarantees correct behavior in the presence of metastability. As a consequence, clock domains can be synchronized without using synchronizers, enabling metastability-free communication between them.

Metastability-Aware Memory-Efficient Time-to-Digital Converters

“…This enables the TDC to be reused for additional measurements while time-stamps resolve metastability in memory. Resolving during/after Computation: Friedrichs et al propose a new approach [5]: they introduce the concept of metastability-containing circuits. Instead of waiting for the metastable bits to stabilize, such circuits guarantee a bounded degree of uncertainty in outputs, given that the input comprises a bounded amount of metastable bits.…”

“…No Resolution: If all operations are metastability-containing, resolving metastability is not necessary at all. For example, this is the case when the result of the computation is used for analog control; the authors of [2], [5], [9] discuss clock synchronization as an application where this is feasible and of interest. We emphasize that existing TDC designs have severe limitations when it comes to the last two options:…”

“…Section II). Therefore, the techniques presented here are a big step towards an efficient implementation of the clock synchronization scheme proposed by Friedrichs et al [5].…”

“…Note that these strings differ in all bits. As shown in [5], any circuit computing the binary representation of unary inputs may thus return MMMM when given input 1111111M. This is to be seen as a discrete version of Marino's impossibility result [10].…”

“…As a starting point, observe that we know that no circuit can avoid metastability of an output bit if, given all other inputs, the output value depends on an input bit that may be metastable [5], [10]. Therefore, the first key insight is that we must use an encoding guaranteeing that metastability of any latch must not cause metastability of more than one output bit: otherwise, for any encoding without redundancy, we must lose precision, as two or more bits resolving to arbitrary values can induce a change of the encoded value larger than 1.…”