Microstructure modulation for resistance reduction in copper interconnects

Yang, Chih‐Chao; Spooner, T.; McLaughlin, P.; Hu, Chao; Huang, Huai; Mignot, Yann; Ali, Muhammad Zeshan; Lian, Guoda; Quon, R.; Standaert, T.; Edelstein, D.

doi:10.1109/iitc-amc.2017.7968968

Cited by 10 publications

(2 citation statements)

References 2 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The thermal stability of the activated As atoms has been assessed, assuming the typical BEOL anneal conditions (100 °C-420 °C for 10 m to 1 h with furnace anneal, [40][41][42][43] whereas ∼1300 °C for ∼10 -7 to ∼10 -4 s with LA). 30,43) In Ref.…”

mentioning

confidence: 99%

Microsecond non-melt UV laser annealing for future 3D-stacked CMOS

Tabata

Rozé

Thuries

et al. 2022

Appl. Phys. Express

View full text Add to dashboard Cite

Three-dimensional (3D) CMOS technology encourages the use of UV laser annealing (UV-LA) because the shallow absorption of UV light into materials and the process timescale typically from nanoseconds (ns) to microseconds (µs) strongly limit the vertical heat diffusion. In this work, µs UV-LA solid phase epitaxial regrowth (SPER) demonstrated an active carrier concentration surpassing 1 × 1021 at./cm3 in an arsenic ion-implanted silicon-on-insulator substrate. After the subsequent ns UV-LA known for improving CMOS interconnect, only a slight (⁓5%) sheet resistance increase was observed. The results open a possibility to integrate UV-LA at different stages of 3D-stacked CMOS.

show abstract

mentioning

confidence: 99%

Microsecond non-melt UV laser annealing for future 3D-stacked CMOS

Tabata

Rozé

Thuries

et al. 2022

Appl. Phys. Express

View full text Add to dashboard Cite

show abstract

“…In recent years, the impacts of LA have started to be investigated in real BEOL modules or blanket thin films. Its expected benefit is to enable a bamboo-like structure (i.e., reduction of electron scattering spots) in scaled BEOL lines thanks to the capability of processing wafers at a higher temperature (possibly melting Cu but not Ru) than in typical BEOL furnace annealing (e.g., less than 420 • C up to 1 h [71][72][73][74]). As shown in Figures 13 and 14, ns LA (non-UV) indeed shows such a potential [75,76].…”

Section: Beol Applicationsmentioning

confidence: 99%

Recent Progresses and Perspectives of UV Laser Annealing Technologies for Advanced CMOS Devices

et al. 2022

View full text Add to dashboard Cite

The state-of-the-art CMOS technology has started to adopt three-dimensional (3D) integration approaches, enabling continuous chip density increment and performance improvement, while alleviating difficulties encountered in traditional planar scaling. This new device architecture, in addition to the efforts required for extracting the best material properties, imposes a challenge of reducing the thermal budget of processes to be applied everywhere in CMOS devices, so that conventional processes must be replaced without any compromise to device performance. Ultra-violet laser annealing (UV-LA) is then of prime importance to address such a requirement. First, the strongly limited absorption of UV light into materials allows surface-localized heat source generation. Second, the process timescale typically ranging from nanoseconds (ns) to microseconds (μs) efficiently restricts the heat diffusion in the vertical direction. In a given 3D stack, these specific features allow the actual process temperature to be elevated in the top-tier layer without introducing any drawback in the bottom-tier one. In addition, short-timescale UV-LA may have some advantages in materials engineering, enabling the nonequilibrium control of certain phenomenon such as crystallization, dopant activation, and diffusion. This paper reviews recent progress reported about the application of short-timescale UV-LA to different stages of CMOS integration, highlighting its potential of being a key enabler for next generation 3D-integrated CMOS devices.

show abstract

Solving the Annealing of Mo Interconnects for Next‐Gen Integrated Circuits

Erofeev,

Hartanto,

Saidov

et al. 2024

Adv Elect Materials

View full text Add to dashboard Cite

Recent surge in demand for computational power combined with strict constraints on energy consumption requires persistent increase in the density of transistors and memory cells in integrated circuits. Metal interconnects in their current form struggle to follow the size downscaling due to materials limitations at the nanoscale, causing severe performance losses. Next‐generation interconnects need new materials, and molybdenum (Mo) is considered the best choice, offering low resistivity, good scalability, and barrierless integration at a low cost. However, it requires annealing at temperatures far exceeding the currently accepted limit. In this work, the challenges of high‐temperature annealing of patterned Mo nanowires are looked into, and a new approach is presented to overcome them. It is demonstrated that while a conventional annealing process improves the average grain size, it can also reduce the cross‐section area, thus increasing the resistivity. Using high‐resolution transmission electron microscopy (TEM) with in situ heating, the evolution of structural features in real time is directly observed. Using insights from these experiments, a cyclic pulsed annealing method is developed, and it is shown that the desired grain structure is achieved in only a few seconds, without forming the surface grooves. These findings can radically facilitate Mo integration, boosting the efficiency of future integrated circuits.

show abstract

Microstructure modulation for resistance reduction in copper interconnects

Cited by 10 publications

References 2 publications

Microsecond non-melt UV laser annealing for future 3D-stacked CMOS

Microsecond non-melt UV laser annealing for future 3D-stacked CMOS

Recent Progresses and Perspectives of UV Laser Annealing Technologies for Advanced CMOS Devices

Solving the Annealing of Mo Interconnects for Next‐Gen Integrated Circuits

Contact Info

Product

Resources

About