Microwave frequency synthesizers

Makarenko, B. I.; Kleiman, A.S.; Dyubko, S. F.; Alekseev, E. A.

doi:10.1109/msmw.2001.947345

Cited by 2 publications

(1 citation statement)

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“…The PLL has to trade off between frequency step size and phase noise [4]. In order to achieve better performances, the research on the hybrid frequency synthesis technology such as the DS-PLL, the DDS-PLL, the DS-DDS and the DS-PLL-DDS, is very popular and challenging [5][6][7][8].…”

Section: Introductionmentioning

confidence: 99%

A low spurious and small step frequency synthesizer based on PLL-DDS-PLL architecture

Tang

2008

2008 11th IEEE Singapore International Conference on Communication Systems

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This paper describes a low spurious and small step frequency synthesizer module based on PLL (Phase-Locked Loop)-DDS (Direct Digital Synthesis)-PLL structure, which is controlled by the parallel port of the computer. The module consists of four parts: the first PLL (PLL1), the DDS, the second PLL (PLL2) and the control part. The spurious of this module is ameliorated to some extent in comparison with traditional synthesizer technologies using single PLL. The experimental measurement of the actual module shows that the spurious is as low as 65dBc. In addition, its frequency range is 2060MHz-2160MHz, the frequency step size 10 kHz, the phase noise 90dBC/Hz@10kHz and the harmonics 40dBc.

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Section: Introductionmentioning

confidence: 99%