Modeling and Parallel Simulation of Large ATM Switch Fabrics

Abstract

Simulation is an essential tool in the development, testing, and performance evaluation of communication systems. In this paper we discuss a practical case where large ATM switches are needed and develop a cell-level simulator to evaluate the performance of such switches. We exploit the conservative time-window algorithm for parallel simulation to reduce the simulation time and resolve the memory limitation problem with sequential machines. We simulate ATM switches of sizes up to 1 k x 1 k ports. A speed-up of 7 using ten processors on a shared-memory multiprocessor is achieved.