Modeling jitter in Continuous-Time sigma-delta modulators

Abstract

In this paper, a fast and accurate technique for modeling and simulation of clock jitter in Continuous-Time sigma-delta (Σ∆) modulators is introduced. In addition to its high speed compared to the traditional jitter simulation method, the proposed technique is still continuous-time based which is more convenient than discrete-time based jitter modeling suggested in other publications. Mathematical principle of the proposed technique as well as simulations results are presented and compared to other simulation techniques.