2015
DOI: 10.12785/ijcds/040103
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Networks-on-Chip Architecture Customization using Network Partitioning: A System-Level Performance Evaluation

Abstract: Networks-on-Chip (NoC) design is a trade-off between cost and performance. To realize the best trade-off between these factors, researchers have recently proposed using network partitioning techniques to customize the NoC architecture according to the application requirements. In this paper, the impact of using partitioning on different NoC metrics; namely, power, area, and delay, is analyzed. We present a system-level methodology to evaluate the performance of using partitioning-based architecture customizati… Show more

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Cited by 3 publications
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