Nitridation effects on Pb center structures at SiO2/Si(100) interfaces

Miura, Y.; Fujieda, Shinji

doi:10.1063/1.1687034

Cited by 11 publications

(4 citation statements)

References 29 publications

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“…The main differences between the two defects are in the dangling bond axis of symmetry [12][13] and in differences in the defects' electronic density of states [14][15][16][17][18]. However, in contrast to the reports of Fujieda et al [8][9][10], we observed that NBTS generates a completely new defect center in PNO-based devices. Despite this fundamental atomic-scale difference in defect generation, the defect generation activation energies for both PNO and SiO 2 devices were found to be equivalent within experimental error.…”

Section: Introductioncontrasting

confidence: 78%

“…The conflicting high temperature anneal response might be a result of the fact that these E′ centers are confined within an ultrathin dielectric region. Fujieda et al reported that the addition of nitrogen in the gate dielectric caused a modification to the P b1 structure that lowered the g-value (g = 2.0027) for the magnetic field orientated parallel to the Si/dielectric normal [9][10]. Recall that the g is actually a second rank tensor quantity.…”

Section: Discussionmentioning

confidence: 97%

“…ESR has proven useful in monitoring atomic scale defects that play important roles in many CMOS reliability problems [7]. In a pioneering study, Fujieda et al successfully utilized conventional ESR measurements to study NBTI interface state generation [8][9][10]. Their experiments, however, involved large area (~1 cm 2 ) bare oxide structures on p-type substrates.…”

Section: Introductionmentioning

confidence: 98%

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NBTI: An Atomic-Scale Defect Perspective

Campbell

Lenahan

Krishnan

et al. 2006

2006 IEEE International Reliability Physics Symposium Proceedings

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We utilize a combination of MOSFET-gate controlled diode DC-IV measurements and a very sensitive electrically-detected electron spin resonance technique called spindependent recombination to observe and identify defect centers generated during NBTI in fully processed SiO 2 and plasma nitrided oxide (PNO)-based pMOSFETs. In SiO 2 devices, we observe the NBTI-induced generation of two Si/SiO 2 interface silicon dangling bond centers (P b0 and P b1 ) and very likely an oxide silicon dangling bond center (E′). Our observations indicate that both P b0 and P b1 defects play major roles in these SiO 2 -based devices and also suggest that E′ centers could play an important role. In PNO devices, we observed the NBTI-induced generation of a new defect center which is fundamentally different from the P b0 /P b1 defects generated during NBTI in SiO 2 devices. Our results indicate that it plays a dominating role in NBTI-induced interface state generation in thin PNO devices and also exhibits a post-negative bias temperature stress (NBTS) recovery. Although we observe different interface state defects, we observed essentially equivalent activation energies in both the SiO 2 and PNO devices. [Keywords: negative bias temperature instability, interface traps, MOSFET, spindependent recombination]

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Section: Introductioncontrasting

confidence: 78%

Section: Discussionmentioning

confidence: 97%

Section: Introductionmentioning

confidence: 98%

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NBTI: An Atomic-Scale Defect Perspective

Campbell

Lenahan

Krishnan

et al. 2006

2006 IEEE International Reliability Physics Symposium Proceedings

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“…From the fitting procedure with two lorentzian curves, g-values were determined to be 2.0058Ϯ 0.0006 and 2.0031Ϯ 0.0006, coincident well with values of P b0 -and P b1 -centers, respectively. 12 Their peak-to-peak width were 3.8 and 4.1 G, somewhat larger than reported values for the SiON/Si with 4.8% nitrogen content, 3.3 and 3.7 G. 12 This could be induced by high power microwave 13 and inevitable in SDT measurements. In order to reconfirm trap origins, we also measured the g-anisotropy map.…”

Section: Interface Traps Responsible For Negative Bias Temperature Inmentioning

confidence: 63%

Interface traps responsible for negative bias temperature instability in a nitrided submicron metal-oxide-semiconductor field effect transistor

Yonamoto¹,

Akamatsu²

2011

Appl. Phys. Lett.

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Articles you may be interested inBulk and interface trap generation under negative bias temperature instability stress of p-channel metaloxide-semiconductor field-effect transistors with nitrogen and silicon incorporated HfO 2 gate dielectrics Appl. Phys. Lett. 98, 063504 (2011); 10.1063/1.3541879 Identification of the atomic-scale defects involved in the negative bias temperature instability in plasmanitrided p -channel metal-oxide-silicon field-effect transistors Interface trap and oxide charge generation under negative bias temperature instability of p -channel metaloxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics J. Appl. Phys. 98, 114504 (2005); 10.1063/1.2138372 Enhanced channel mobility of 4H-SiC metal-oxide-semiconductor transistors fabricated with standard polycrystalline silicon technology and gate-oxide nitridation Nitrided thermal SiO 2 for use as top and bottom gate insulators in self-aligned double gate silicon-oninsulator metal-oxide-semiconductor field effect transistor

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