Nonlinear distortion in current-steering D/A-converters due to asymmetrical switching errors

Clara, Martin; Wiesbauer, A.; Klatzer, W.

doi:10.1109/iscas.2004.1328187

Cited by 16 publications

(13 citation statements)

References 6 publications

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“…If e on and e off are different e ISI will again be an asymmetric sinusoid and contain harmonics. Fourier expansion of e ISI with DWA [36] will produce the same result as (25), but with even harmonics proportional to A x rather than A dx :…”

Section: Delta-sigma Ssnr Estimationmentioning

confidence: 84%

“…Another topology dependent error source in a DAC is signal dependent errors from non-ideal DAC element switching [36,37], commonly called inter-symbol interference (ISI). Switching errors or glitches can stem from charge injection and clock feedthrough causing overshoot, or time constants in the switching network causing limited rise and fall times.…”

Section: Dynamic Errors and Signal-to-switching Noise Ratiomentioning

confidence: 99%

“…If we first evaluate dx and x is a sinusoid of amplitude A x and frequency x x , Fourier series expansion yields [36]:…”

Section: Delta-sigma Ssnr Estimationmentioning

confidence: 99%

“…It can, however, in many cases be assumed to be dominated by slewing, causing the element to have limited rise and fall times. To make the area calculation simple we assumed linear slewing as in [36], with limited rise-and fall-times t r and t f so that the switching errors became: Figure 17 shows the simulated output spectra of DEM switched and otherwise ideal DACs having 5ps slewing asymmetry. The DAC input is generated by a fifth-order 5-bit DSM REQ for audio, L = 64 and f s_in = 44.1 kHz.…”

Section: Ssnr Estimate Verificationmentioning

confidence: 99%

See 3 more Smart Citations

Review and advances in delta-sigma DAC error estimation based on additive noise modelling

Løkken

Vinje

Hernes

et al. 2009

Analog Integr Circ Sig Process

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High-resolution and very high resolution data conversion is dominated by the use of delta-sigma modulating converters. Oversampling and noise-shaping is employed to enable a coarsely quantized conversion with high effective resolution. The time-domain output waveform from a delta-sigma modulator is often impossible to predict analytically, therefore modulator design is largely based on high level digital simulations and rule-of-thumb estimation. However, the output waveform also largely determines the distortion caused by analog error sources in the converter. Therefore optimization of the modulator with regards to digital quantization noise might not yield an optimal design when analog errors are included. This paper extends common estimation methods to include analog error sources, with the objective of enabling more global rule-of-thumb optimization.

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Section: Delta-sigma Ssnr Estimationmentioning

confidence: 84%

Section: Dynamic Errors and Signal-to-switching Noise Ratiomentioning

confidence: 99%

“…If we first evaluate dx and x is a sinusoid of amplitude A x and frequency x x , Fourier series expansion yields [36]:…”

Section: Delta-sigma Ssnr Estimationmentioning

confidence: 99%

Section: Ssnr Estimate Verificationmentioning

confidence: 99%

See 2 more Smart Citations

Review and advances in delta-sigma DAC error estimation based on additive noise modelling

Løkken

Vinje

Hernes

et al. 2009

Analog Integr Circ Sig Process

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show abstract

“…The glitch effects are related to the clock feed through and switched induced energy of the internal switching circuitry. Clara et al [9] investigated the non-linear distortion effects of switching and determined the harmonic distortion due to asymmetry in the signal switching for harmonic n=1,2,3.. in Equation 2.…”

Section: -Bit Unary Current Steering Dacmentioning

confidence: 99%

VLSI-SoC: Advanced Research for Systems on Chip

2012

IFIP Advances in Information and Communication Technology

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Abstract. Direct Digital Synthesis (DDS) systems generate fine frequency resolution signals over a broad spectrum that are used in a wide variety of applications such as multi-mode RF, communications, measurements and test. A high performance DDS band-pass Digital to Analog Converter (DAC) architecture and implementation is presented that delivers high spectral purity over a narrow-band response. The low power D/A Converter is portable to standard CMOS processes and designed to achieve over 100dB narrow-band SFDR performance using Sigma-Delta (∑Δ) modulation and multi-bit current steering techniques. A 3 rd order digital ∑Δ modulator is combined with a 4 th order digital Dynamic Element Matching (DEM) block to shape the noise while calibrating for process mismatch variations. A low silicon area output stage is used to deliver a high performance specification.

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Continuous-Time Sigma-Delta A/D Conversion

2006

Springer Series in Advanced Microelectronics

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The Springer Series in Advanced Microelectronics provides systematic information on all the topics relevant for the design, processing, and manufacturing of microelectronic devices. The books, each prepared by leading researchers or engineers in their f ields, cover the basic and advanced aspects of topics such as wafer processing, materials, device design, device technologies, circuit design, VLSI implementation, and subsystem technology. The series forms a bridge between physics and engineering and the volumes will appeal to practicing engineers as well as research scientists. Microcontrollers in PracticeBy I. Susnea and M. Mitescu 19 Gettering Defects in Semiconductors

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Nonlinear distortion in current-steering D/A-converters due to asymmetrical switching errors

Cited by 16 publications

References 6 publications

Review and advances in delta-sigma DAC error estimation based on additive noise modelling

Review and advances in delta-sigma DAC error estimation based on additive noise modelling

VLSI-SoC: Advanced Research for Systems on Chip

Continuous-Time Sigma-Delta A/D Conversion

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