Novel 8-bit reversible full adder/subtractor using a QCA reversible gate

Kianpour, Moein; Sabbaghi‐Nadooshan, Reza

doi:10.1007/s10825-017-0963-1

Cited by 41 publications

(15 citation statements)

References 36 publications

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“…7 [13]. The signal flow in any QCA circuits controlled by Landauer clocks which has four different phases first-Switch, second-Hold, third-Release and fourth-Relax [21][22][23][24][25][26][27][28][29][30]. The phases of wires are calculated by Eq.…”

Section: Fundamental Of Qca-design Technologymentioning

confidence: 99%

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WITHDRAWN: Optimal energy estimation of Toffoli and Peres gate design using quantum-dot cellular automata

Patidar¹,

Gupta²

2021

Preprint

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Quantum-dot cellular automata (QCA) are a novel dominant transistor-less computational nanotechnology. It is an appropriate candidate for the upcoming generation of quantum computational nano-electronics technology. The main objective of this research work is to present a QCA reversible logic circuits design such as the Toffoli gate (TG) and Peres gate (PG) and do the analysis of different parameters. In this paper, we propose a single layer coplanar method to solve this physical layout design and synchronization problem. The presented reversible logic gate (RLG) layout designs are implemented by Bijection functional algorithm for reduction of the number of QCA (quantum) cells, latency, and minimum design area. Also, the Optimized energy dissipation and effect of temperature on output polarization cell, of the proposed structure have been checked successfully using the tool QD-E (Energy) tool. The proposed QCA design has been verified by QCADesigner-E 2.2 tool using a bistable approximation and coherence vector engine. Finally, comparisons have been proposed RLG-TG and RLG-PG designs with the existing QCA design.

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Section: Fundamental Of Qca-design Technologymentioning

confidence: 99%

“…G. Singh et al[24] has presented different reversible logic gates by using QCA 5input majority voter logic. M. Kianpour et al[27] has proposed 8-bit combinational full adder/substractor RLG and Toffoli gate by Landauer theory. Both circuits are designed by QCADesigner tool with using bistable approximate simulation engine.…”

mentioning

confidence: 99%

WITHDRAWN: Optimal energy estimation of Toffoli and Peres gate design using quantum-dot cellular automata

Patidar¹,

Gupta²

2021

Preprint

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“…This work is repeated until common states in outputs is deleted fully. By using this method, directly, can create each type reversible functions with minimum complexity, area, garbage outputs, control inputs and delay while the another methods such as [29,30,36] have used common reversible blocks such as Toffoli and Fredkin gates or building of reversible blocks for designing another reversible functions that this methods are not optimal. Our method has the minimum number of garbage outputs.…”

Section: A Methods For Converting Multi-output Functions To Reversiblmentioning

confidence: 99%

“…Then, a full adder design with reversible QCA1 gates has been proposed. Also, in [30], a novel 3 × 3 reversible gate that is universal and testable has been presented. By using this gate, a new 8-bit full-adder is designed.…”

Section: Introductionmentioning

confidence: 99%

New symmetric and planar designs of reversible full-adders/subtractors in quantum-dot cellular automata

Sarvaghad-Moghaddam

Orouji

2019

Eur. Phys. J. D

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Quantum-dot Cellular Automata (QCA) is one of the emerging nanotechnologies, promising alternative to CMOS technology due to faster speed, smaller size, lower power consumption, higher scale integration and higher switching frequency. Also, power dissipation is the main limitation of all the nano electronics design techniques including the QCA. Researchers have proposed the various mechanisms to limit this problem. Among them, reversible computing is considered as the reliable solution to lower the power dissipation. On the other hand, adders are fundamental circuits for most digital systems. In this paper, Innovation is divided to three sections. In the first section, a method for converting irreversible functions to a reversible one is presented. This method has advantages such as: converting of irreversible functions to reversible one directly and as optimal. So, in this method, sub-optimal methods of using of conventional reversible blocks such as Toffoli and Fredkin are not used, having of minimum number of garbage outputs and so on. Then, Using the method, two new symmetric and planar designs of reversible full-adders are presented. In the second section, a new symmetric, planar and fault tolerant five-input majority gate is proposed. Based on the designed gate, a reversible full-adder are presented. Also, for this gate, a fault-tolerant analysis is proposed. And in the third section, three new 8-bit reversible fulladder/subtractors are designed based on full-adders/subtractors proposed in the second section. The results are indicative of the outperformance of the proposed designs in comparison to the best available ones in terms of area, complexity, delay, reversible/irreversible layout, and also in logic level in terms of garbage outputs, control inputs, number of majority and NOT gates.

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“…A reversible Arithmetic Logic Unit (ALU) is designed by Naghibzadeh and Houshmand [43] using QCA cells so that the implementation process is enhanced by the evaluation parameters. In addition, Kianpour and Sabbaghi-Nadooshan [44] suggested an 8-bit reversible full adder/subtractor, which applies QCA reversible circuit technology.…”

Section: Introductionmentioning

confidence: 99%

Novel reversible CLA, optimized RCA and parallel adder/subtractor circuits

Gharajeh

Haghparast

2020

Serb J Electr Eng

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This paper proposes reversible circuit designs of the three most commonly used adders: carry look-ahead adder (CLA adder), ripple carry adder (RCA adder), and parallel adder/subtractor. The n-bit reversible CLA adder, called CLA-GH, is designed using the Peres and Fredkin gates. The n-bit optimized reversible RCA adder, called ORCA-GH, is designed using the reversible circuit of a parity-preserving reversible full adder. Both circuits reduce the quantum cost. However, the ORCA-GH circuit also improves the number of constant inputs. Furthermore, the n-bit reversible parallel adder/subtractor, called PAS-GH, is designed using the Feynman, Peres, and Fredkin gates. It decreases the number of garbage outputs and quantum cost. The transistor realizations of the CLA-GH and PAS-GH circuits are provided accordingly. The evaluation results indicate that the proposed circuits surpass the existing works in all figures of merit.

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Novel 8-bit reversible full adder/subtractor using a QCA reversible gate

Cited by 41 publications

References 36 publications

WITHDRAWN: Optimal energy estimation of Toffoli and Peres gate design using quantum-dot cellular automata

WITHDRAWN: Optimal energy estimation of Toffoli and Peres gate design using quantum-dot cellular automata

New symmetric and planar designs of reversible full-adders/subtractors in quantum-dot cellular automata

Novel reversible CLA, optimized RCA and parallel adder/subtractor circuits

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