Novel Placement Bias For Realizing Highly Reliable Physical Unclonable Functions on FPGA

Chauhan, Arjun Singh; Sahula, Vineet; Mandal, A. S.

doi:10.1109/conecct.2018.8482381

Cited by 4 publications

(6 citation statements)

References 18 publications

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“…The methods [1] [8] [9] occupy similar number of slices in comparison to our present approach. Furthermore, the resources required to produce a single bit response is approximately the same as reported in [8] [9].…”

Section: Comparisonmentioning

confidence: 96%

“…The work proposed in this paper is substantial extension of authors' work for ROPUF reliability and uniqueness enhancement using randomized and biased placement on FPGA [9] [8]. Following are our additional contributions in this manuscript.…”

Section: Our Contributionmentioning

confidence: 97%

“…The author Chauhan et al presented an approach, which improves the reliability of ROPUF design by increasing frequency difference among ring oscillators [8]. The authors have proposed, the enhancement in frequency difference using a new characterization phase, biased placement and k-means clustering.…”

Section: Related Workmentioning

confidence: 99%

“…The source of environmental variation is temperature (T), supply voltage (V) and device aging (λ). Rewriting (7) in (8). (8), it is clear that reliable condition (no frequency sign change) can be achieved by either (9) or (10).…”

Section: Effect Of Environmental Errormentioning

confidence: 99%

“…The method in [18] provides reliable responses in the presence of both temperature and supply voltage variation, however, it requires post-processing to achieve that much reliability. The approaches [1] [8], provide reliable response with no environmental variations. The approaches [33] [42], provide better reliability as compared to all other approaches, except our approach, in the presence of environmental variations.…”

Section: Comparisonmentioning

confidence: 99%

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Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness

2019

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The physical unclonable functions (PUF) are used to provide software as well as hardware security for the cyber-physical systems. They have been used for performing significant cryptography tasks such as generating keys, device authentication, securing against IP piracy, and to produce the root of trust as well. However, they lack in reliability metric. We present a novel approach for improving the reliability as well as the uniqueness of the field programmable gated arrays (FPGAs) based ring oscillator PUF and derive a random number, consuming very small area (< 1%) concerning look-up tables (LUTs). We use frequency profiling method for distributing frequency variations in ring oscillators (RO), spatially placed all across the FPGA floor. We are able to spot suitable locations for RO mapping, which leads to enhanced ROPUF reliability. We have evaluated the proposed methodology on Xilinx -7 series FPGAs and tested the robustness against environmental variations, e.g. temperature and supply voltage variations, simultaneously. The proposed approach achieves significant improvement (i) in uniqueness value upto 49.90%, within 0.1% of the theoretical value (ii) in the reliability value upto 99.70%, which signifies that less than 1 bit flipping has been observed on average, and (iii) in randomness, signified by passing NIST test suite. The response generated through the ROPUF passes all the applicable relevant tests of NIST uniformity statistical test suite.

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