“…For instance, authors in [2] propose a PUF based on the resistance variations in the power grids. At the circuit level, different PUF cell circuit topologies have been proposed, e.g., static random-access memories (SRAMs) [3,4,5], proportional to absolute temperature (PTAT) voltage generators [6], NAND gates [7], current mirrors [8], analog amplifiers [9], ternary content addressable memory (TCAM) [10], sub-threshold current array [11], and leakage-based PUF [12]. In [3], delay variation is used in the clock path to generate PUF outputs, and a post processing circuit is exploited to improve robustness further.…”