2014
DOI: 10.1587/transinf.2014edp7039
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On Achieving Capture Power Safety in At-Speed Scan-Based Logic BIST

Abstract: SUMMARYThe applicability of at-speed scan-based logic built-in self-test (BIST) is being severely challenged by excessive capture power that may cause erroneous test responses even for good circuits. Different from conventional low-power BIST, this paper is the first to explicitly focus on achieving capture power safety with a novel and practical scheme, called capture-power-safe logic BIST (CPS-LBIST). The basic idea is to identify all possibly-erroneous test responses caused by excessive capture power and us… Show more

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