Operation-condition and timing-error collaborative monitoring for fixed-latency AVS designs

Abstract

Applying adaptive voltage scaling (A VS) to a fixed latency design for low power is not straightforward. In this work, we propose an operation-condition and timing-error collaborative monitoring scheme to achieve this goal. The detection of operation conditions speeds up finding the most appropriate adapted-VDD, and the in-situ detection of timing errors squeezes the guard band while tolerating dynamic variations. We also use our previously proposed technique of time-borrowing with local boost so that a non-stop pipelined design can be achieved when applying the A VS for low power.