Oscillatory False Triggering of Parallel Si and SiC MOSFETs during Short-Circuit Tum-off

Layout-Based Ultrafast Short-Circuit Protection Technique for Parallel-Connected GaN HEMTs

“…In [19], the effect of parameters such as gate resistance and common source inductance over current sharing of parallel connected IGBTs is discussed for hard switching fault (HSF) and fault under load (FUL). In [20], the gate oscillation of parallel connected Si and SiC MOSFETs during the turn-off under a SC fault is investigated. It is pointed that the gate oscillation between parallel connected transistors could reshape the unbalance of current sharing or even cause a false turn-on.…”