P‐143: New Drive Waveforms for High Speed Erase Addressing

Abstract

We propose a new high speed driving waveform which uses a negatively biased voltage to the common electrode and an alternating ramp voltage to the scan electrode during the reset period and an erase address scheme. It showed short discharge time lag under 800nsec, wide address voltage margin over 40V and improved jitter characteristics among different color cells in a 7.5inch test panel with 50inch full HD resolution. Its fast discharge characteristics was attributed to the formation of stronger wall voltage near the middle of the gap during the reset period and the consequent bigger electric field during the scan period which was confirmed by the 3 dimensional emission observation and voltage domain analysis.