P‐85: Simple Drive Scheme for Bistable Cholesteric LCDs

Abstract

In this paper we discuss a new dynamic drive scheme for bistable reflective cholesteric liquid crystal displays with high multiplexing level. Only two voltage levels (U and 0) are used for the addressing in this drive scheme. Addressing speed is about the time of the fast transition of a cholesteric liquid crystal from the homeotropic state to the transient planar state per line. The maximum value of using voltage is slightly overtop the critical voltage of a cholesteric-nematic transition. These facts make this drive scheme very perspective in application for such kind of displays.

Nanoconfinement-Induced Structures in Chiral Liquid Crystals

“…In the former state, these materials reflect circularly polarized light, whereas in the latter state, they scatter light in the forward direction. This makes bi-stable cholesteric phases also very interesting in display technology, because of their low power consumption and low cost of operation [18]. …”

Single-substrate cholesteric liquid crystal displays by colloidal self-assembly

“…Figure 4 is a photograph of an image on a 32ϫ 32 passive-matrix display obtained using the dynamic drive scheme. 12,13 In summary, we have demonstrated a single-substrate electronic paper device based on a self-assembled closepacked PDLC film via the emulsion method on a flexible surface. The emulsion-based close-packed PDLC film has been fabricated on a moving-web coating machine and exhibits excellent electro-optic performance characteristics.…”

P‐176: New High‐Performance Algorithm for 2+2 Dynamic Drive Scheme for Cholesteric LCDs

“…In comparisons with others texture transitions in a ChLC, witch are about tens and hundreds milliseconds, the transition from the H state to the P* state (the H-P* transition) is about one millisecond. Based on the fast H-P* transition and hysteresis character of cholestericnematic transitions in ChLCs various dynamic drive schemes (DDSs) for fast passive-matrix addressing of bistable reflective ChLCDs were proposed [5][6][7][8][9][10][11]. The addressing speed for DDSs is approximately about the H-P* transition time (T HP* ) per row.…”

“…The simplest driving voltage waveforms are realized in so called 2+2 DDSs [9][10][11]. Theses drive schemes require only two-level column and row drivers, which output either U Peak or 0 voltages.…”