PALF: compiler supports for irregular register files in clustered VLIW DSP processors

Abstract

SUMMARYWide varieties of register file architectures -developed for embedded processorshave turned to aim at reducing the power dissipation and die size these years, by contrast with the traditional unified register file structures. This article presents a novel register allocation scheme for a clustered VLIW DSP, which is designed with distinctively banked register files in which port access is highly restricted. Whilst the organization of the register files is designed to decrease the power consumption by using fewer port connections, the cluster-based design makes register access across clusters an additional issue, and the switched-access nature of the register file demands further investigations into optimizing register assignment for increasing the instruction-level parallelism. We propose a heuristic algorithm, named ping-pong aware local favorable (PALF) register allocation, to obtain advantageous register allocation that is expected to better utilize irregular register file architectures. The results of experiments performed using a compiler based on the Open Research Compiler (ORC), showed significant performance improvement over the original ORC's approach, which is considered to be an optimized approach for common register file architectures.key words: register allocation; ping-pong register file; DSP; VLIW

Achieving spilling-friendly register file assignment for highly distributed register files

“…Because the PAC DSP has a clustered organization with distributed register files, the data movement between register files in the PAC DSP is classified into intra-and intercluster communications, which means that the common cluster-assignment problem for VLIW processors [24][25][26] cannot be applied directly to the architecture. Also, the complicated communication makes it desirable to use register file assignment in handling communications, including localconscious global register file assignment [11,12], ping-pong-aware local favorable local register file assignment [6,7], and simulated-annealing local register file assignment [13]. In addition to register file assignment, the copy propagation in the original Open64 compiler has also been improved [29].…”

“…In register file assignment, we have proposed local-conscious global register file assignment [11,12], ping-pong-aware local favorable local register file assignment [6,7], and simulated-annealing local register file assignment [13] to handle the issues.…”

“…Minimizing the communication cost in the PAC DSP makes it desirable to use register file assignment to handle communications [6,7,11,12]. With the assistance of this heuristic approach, we then apply register allocation to each register file.…”

“…The PAC DSP is currently being developed at ITRI STC (Soc Technology Center of Industrial Technology Research Institute in Taiwan), and our laboratory is collaborating with ITRI STC under MOEA (Ministry of Economic Affairs) projects for the challenging work of developing high-performance and low-power tool kits for embedded systems under PAC platforms [6][7][8][9][10][11][12][13].…”

Special Issue: Current Trends in Compilers for Parallel Computers

“…Lin et al [5] propose in their paper a novel register allocation scheme for a clustered VLIW DSP in which some register files are banked. While this structure helps to reduce power dissipation and die area, it imposes many restrictions on the register access across clusters and affects instructionlevel parallelism.…”