Passive differential UHF RFID front-ends in a 40 nm CMOS technology

Zöscher, Lukas; Herkess, Peter; Grosinger, Jasmin; Muehlmann, Ulrich; Amschl, Dominik; Bösch, Wolfgang

doi:10.23919/eumc.2017.8230810

Cited by 8 publications

(4 citation statements)

References 8 publications

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“…Although high efficiencies are reported for −22.4 dBm [13], studies at input powers as low as −30 dBm are rare [14]. Thus, this work is compared to various measurements [10,11,12] and simulations [13,14,15,16,17,18,19] at higher input powers.…”

Section: Resultsmentioning

confidence: 99%

See 1 more Smart Citation

Numerical Optimization of a Fully Cross-Coupled Rectifier Circuit for Wireless Passive Ultra Low Power Sensor Nodes

Mair

Ferdik

Happ

et al. 2019

Sensors

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In the context of the Internet of Things, billions of devices—especially sensors—will be linked together in the next few years. A core component of wireless passive sensor nodes is the rectifier, which has to provide the circuit with sufficient operating voltage. In these devices, the rectifier has to be as energy efficient as possible in order to guarantee an optimal operation. Therefore, a numerical optimization scheme is proposed in this paper, which is able to find a unique optimal solution for an integrated Complementary Metal-Oxide-Semiconductor (CMOS) rectifier circuit with Self-Vth-Cancellation (SVC). An exploration of the parameter space is carried out in order to generate a meaningful target function for enhancing the rectified power for a fixed communication distance. In this paper, a mean conversion efficiency is introduced, which is a more valid target function for optimization than the Voltage Conversion Efficiency (VCE) and the commonly used Power Conversion Efficiency (PCE) and is defined as the arithmetic mean between PCE and VCE. Various trade-offs between output voltage, PCE, VCE and MCE are shown, which provide valuable information for low power rectifier designs. With the proposed method, a rectifier in a low power 55 nm process from Globalfoundries (GF55LPe) is optimized and simulated at −30 dBm input power. A mean PCE of 63.33% and a mean VCE of 63.40% is achieved.

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Section: Resultsmentioning

confidence: 99%

“…However, most publications concerning rectifier design do not mention specifics on how the rectifier itself is optimized. Additionally, most publications do not mention a high VCE as a design goal [10,11,12,13,14,15,16,17,18,19]. We show that using only PCE or VCE is not feasible for an automated design process.…”

Section: Introductionmentioning

confidence: 87%

Numerical Optimization of a Fully Cross-Coupled Rectifier Circuit for Wireless Passive Ultra Low Power Sensor Nodes

Mair

Ferdik

Happ

et al. 2019

Sensors

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“…10 can be classified into three categories: RF-DC converter, RF-DC converter with a Matching Network (MN), and RF-DC converter with a matched antenna (Ant.). The works in [85], [88], [91], and [93] present low-power startup RF-DC converters where the losses of the matching network have been de-embedded. As a result, the RF-DC converters have a high peak PCE between 30%-40%.…”

Section: B Rf Energy Harvestersmentioning

confidence: 99%

Next-Generation IoT Devices: Sustainable Eco-Friendly Manufacturing, Energy Harvesting, and Wireless Connectivity

et al. 2023

Self Cite

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The work of Valentina Palazzi, Paolo Mezzanotte, and Luca Roselli was supported by the Italian Ministry of University and Research (MUR) through the PRIN Project "Development and promotion of the Levulinic acid and Carboxylate platforms by the formulation of novel and advanced PHA-based biomaterials and their exploitation for 3D printed green-electronics applications" under Grant 2017FWC3WC 003. This work did not involve human subjects or animals in its research.

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“…RFID tag chips consist of three functional modules, namely, analog front-end, digital baseband, and non-volatile memory [6] . The analog front-end converts the received RF signals into stable DC voltage and digital data from the reader.…”

Section: Introductionmentioning

confidence: 99%

A novel power-on-reset circuit for passive UHF RFID tag chip

Wang

et al. 2018

J. Semicond.

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A novel power-on-reset (POR) circuit with simple architecture, small values of capacitances, ultra-lower power consumption, and self-adjustable delay time of reset pulse for passive UHF RFID tags is presented in this paper. A proposed delay element was adopted for the features of small capacitances and wide power supply rise time range. An inverter was used as a two-inputs logic device to simplify the architecture of the circuit. The technology used for design and simulation is SMIC 0.18 μm RF. Simulation results show that the circuit functions well under different process corners with different power supply rise time, and is able to generate a POR signal after the power supply is briefly powered off. The static power consumption is less than 30 pA. Moreover, the circuit operates properly along with other modules of analog front-end.

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Passive differential UHF RFID front-ends in a 40 nm CMOS technology

Cited by 8 publications

References 8 publications

Numerical Optimization of a Fully Cross-Coupled Rectifier Circuit for Wireless Passive Ultra Low Power Sensor Nodes

Numerical Optimization of a Fully Cross-Coupled Rectifier Circuit for Wireless Passive Ultra Low Power Sensor Nodes

Next-Generation IoT Devices: Sustainable Eco-Friendly Manufacturing, Energy Harvesting, and Wireless Connectivity

A novel power-on-reset circuit for passive UHF RFID tag chip

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