Path toward manufacturable superconducting qubits with relaxation times exceeding 0.1 ms

Abstract

As the superconducting qubit platform matures towards ever-larger scales in the race towards a practical quantum computer, limitations due to qubit inhomogeneity through lack of process control become apparent. To benefit from the advanced process control in industry-scale CMOS fabrication facilities, different processing methods will be required. In particular, the double-angle evaporation and lift-off techniques used for current, state-of-the-art superconducting qubits are generally incompatible with modern-day manufacturable processes. Here, we demonstrate a fully CMOS compatible qubit fabrication method, and show results from overlap Josephson junction devices with long coherence and relaxation times, on par with the state-of-the-art. We experimentally verify that Argon milling—the critical step during junction fabrication—and a subtractive-etch process nevertheless result in qubits with average qubit energy relaxation times T1 reaching 70 µs, with maximum values exceeding 100 µs. Furthermore, we show that our results are still limited by surface losses and not, crucially, by junction losses. The presented fabrication process, therefore, heralds an important milestone towards a manufacturable 300 mm CMOS process for high-coherence superconducting qubits and has the potential to advance the scaling of superconducting device architectures.

Improving Josephson junction reproducibility for superconducting quantum circuits: junction area fluctuation

“…However, this method has a poor Dolan bridge stability and narrow process window and, therefore, precise control of the fabrication operations is required. The recently developed subtractive methods for junction fabrication have shown promising results [25][26][27][28] . However, these methods require additional process steps with an extremely careful control of interfaces, which makes fabrication significantly more complicated.…”

Material-Inherent Noise Sources in Quantum Information Architecture

“…Through active theoretical and experimental research efforts, the superconducting qubit community has accrued tremendous knowledge and strategies to improve the fifth-order magnitude from 1 ns to 0.3 ms in and from 2 ns to >100 s [ 110 , 111 ] by exploiting the smart design of the quantum circuits, state-of-the-art fabrication techniques, and new materials [ 112 ]. Upon this remarkable progress, researchers have laid out a manufacturing blueprint to demonstrate superconducting qubit circuits with the help of mature industry-scale CMOS facilities toward practical large-scale superconducting quantum architectures [ 113 ].…”

Overcoming I/O bottleneck in superconducting quantum computing: multiplexed qubit control with ultra-low-power, base-temperature cryo-CMOS multiplexer

“…It disrupts the low noise environment designed for qubits in state-of-the-art dilution refrigerator systems 16 . To quantify these effects, the noise performance of the multiplexer is benchmarked using a fixed-frequency high-coherence superconducting transmon qubit (ω q /2π = 3.957 GHz), fabricated using a recently reported fab-compatible superconducting qubit fabrication process 46 . The standard quantum circuit quantum electrodynamics (cQED) architecture is adopted 47 , where the qubit is dispersively coupled to a readout resonator (ω r /2π = 6.471 GHz), which in turn is coupled to a feedline for control and readout (see Supplementary Fig.…”