POETS: A Parallel Cluster Architecture for Spiking Neural Network

Abstract

Spiking Neural Networks (SNNs) are known as a branch of neuromorphic computing and are currently used in neuroscience applications to understand and model the biological brain. SNNs could also potentially be used in many other application domains such as classification, pattern recognition, and autonomous control. This work presents a highly-scalable hardware platform called POETS, and uses it to implement SNN on a very large number of parallel and reconfigurable FPGA-based processors. The current system consists of 48 FPGAs, providing 3072 processing cores and 49152 threads. We use this hardware to implement up to four million neurons with one thousand synapses. Comparison to other similar platforms shows that the current POETS system is twenty times faster than the Brian simulator, and at least two times faster than SpiNNaker.

Neuromorphic Design Using Reward-based STDP Learning on Event-Based Reconfigurable Cluster Architecture

“…In this work, we use a partially ordered event-triggered system (POETS) platform that computation and communication happen through sending and receiving events occurring in thousands of concurrent hardware threads [16,18]. Figure 1 shows how neurons are assigned into our hardware threads to communicate via message box and using on-chip memory for temporary synaptic weights, and off-chip memory for calculated weights.…”