2011 IEEE/ACM International Symposium on Nanoscale Architectures 2011
DOI: 10.1109/nanoarch.2011.5941492
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Power efficient nanophotonic on-chip network for future large scale multiprocessor architectures

Abstract: This paper proposes new architectures for data and control planes in a nanophotonic networks-on-chip (NoC) with the key advantages of scalability to large scale networks, constant node degree, and simplicity. Moreover, we propose a minimal deterministic routing algorithm for the data network which leads to small and simple photonic switches. Built upon the proposed novel topology, we present a scalable all-optical NoC, referred to as 2D-HERT, which offers passive routing of optical data streams based on their … Show more

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