Power integrated circuit implementation of optimal adaptive voltage positioning scheme using progressive waveform shaping algorithm

Abstract

Adaptive voltage positioning (AVP) scheme is widely adopted in the high-load voltage regulation modules (VRMs) because it helps VRMs reducing almost half the number of output capacitors for the same design without using AVP. The AVP scheme is claimed to be optimal if its voltage transient behaviour is linear by tuning the current sensing parameter (R i) to match the value of the output capacitor equivalent series resistor (ESR). In this study, a progressive waveform-shaping method is proposed to automatically achieve optimal AVP for the VRMs without manually setting the optimal R i. Hence, as long as a proper ESR of the output capacitor is determined, VRM designers can use the least output capacitor numbers to obtain the optimal AVP waveform. The proposed method is especially appealing for the power integrated circuit application. The overall controller design was implemented by the Taiwan semiconductor manufacturing company (TSMC) 0.18 μm manufacturing process. In the real implementation, an AVP-based buck converter was devised to perform 5 μs linear transient in response to the 10 A/5 μs load current step at 1.2 V output voltage. Test of the circuit shows that the AVP performance is comparable to those state of the art.