Practical applications of 2-D optical proximity corrections for enhanced performance of 0.25 μm random logic devices

Photolithography

“…Ensuring that the alterations are performed quickly and correctly is difficult on modern designs, which contain hundreds of millions of features, multiple feature patterns, and multiple design styles. Subresolution features and small jogs in altered features create enormous difficulties for reticle manufacture and inspection (62). Additionally, the substantial increase in design file size can overload the capabilities of reticle patterning and inspection tools.…”

“…Often a systematic mismatch in patreach zero. This phase shifting effect increases the contrast tern size, shape or spacing occurs (62). The original design of the image.…”

A Pattern-Based Domain Partition Approach to Parallel Optical Proximity Correction in VLSI Designs

“…For design and fabrication of very large scale integrated (VLSI) circuit and system-on-chip (SoC), it requires transferring the desired layouts of VLSI circuit onto the wafers through lithography processes [1,8,9,19,2,21,18,20,7,4,15,5,22,16,17,24,25]. However, the exposure on wafer will result in various distortions due to the proximity effects.…”

“…Optical proximity correction (OPC) is the process of modifying the polygons that are drawn by designers to compensate for the non-ideal properties of the lithography process [19,2,21,18,20,7,4,24,25]. Given the shapes desired on the wafer, the mask is modified to improve the reproduction of the critical geometry.…”