Prediction of harmonic tuning performance in pHEMTs

Abstract

Ah.ftract -This paper focuses on the characterization and optimization of microwave power transistors using a comme rcial on-wafer harmonic load pull system . Specific attention is paid to the output tuning of the second hannonic impedance presented to the device. The ability to quantifY the level of accuracy in a load puD system is explored by using \'arious calibration validation methods. Experiments and simulation comparisons are described for a GaAs pHEMT and a GaAs HJFET. The measured harmonic load pull data pointed to different guidance on how one would match the 2nd harmonic for best performance.