Principles of Floating Gate Devices

Abstract

The floating gate device is the basic building block for many types of nonvolatile memories: Flash, EPROM and EEPROM. In a memory product, single FG devices have to be connected together and compacted to use the smaller possible area on silicon. Depending on applications, different architectures have been introduced and manufactured. Some allow parallel access (program and read of a randomly addressed cell) and are better suited for embedded applications, others allow serial access (read and program are performed by page, i.e. more cells at the same time) and are better suited for mass storage applications.In this Chapter we will illustrate the physical mechanisms involved in FG program and erase operations. We will investigate the effects of these mechanisms on the reliability of the single FG device. We will also show that when a single FG device is part of an array, many reliability issues can arise. All this information will be used to forecast scaling issues of the FG device.