Proficient receptive combined address generator archetypal for WiMAX and WiFi deinterleaver precinct

Abstract

In this paper a combined responsive address generator archetypal for WiMAX and WiFi deinterleaver unit aimed for using in wireless broadband system is being proposed. Deinterleaver is used in conjunction with forward error correction unit for eliminating and correcting different transmission errors which occurs when signals are transmitted from base station to subscriber station. Address generator unit plays a vital role in deciding the overall performance of deinterleaver section. A novel proficient address generator supporting varying modulation schemes such as QPS K, 16-QAM and 64-QAM for both WiMAX and WiFi systems is being proposed in this paper. By combining the address generator unit we can use this design to generate deinterleaver addresses for both WiMAX and WiFi enabled scenarios with ease. The FPGA and 130 nm standard library AS IC results are studied by modelling the design in VHDL. Keywords-transmission errors; WiMAX (Worldwide interoperability for microwave access); WiFi (Wireless Fidelity); FPGA; deinterleaver, (BER) Bit-Error-Rate I.978-1-4799-4190-2/14/$31.00 ©2014 IEEE