Programmable Accelerators for Reconfigurable Video Decoder

In this paper, a power aware mapping of a reconfigurable video coding (RVC) representation of an H.264/AVC encoder on a heterogeneous many-core platform has been presented. Through this example the benefits of using RVC for flexible and future proof implementations has been highlighted. Furthermore, the low cost modeling of the power efficient mapping algorithm enables dynamic mapping of applications on many-core platforms where power is a concern. Preliminary results indicate that the mapped encoder is much more efficient in terms of power consumption without any significant impact on its performance. Index Terms-Reconfigurable video coding, Many-core platform, mapping algorithms

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Power aware mapping of an RVC encoder on a many-core platform

Moghadas

Hashemi

2011

2011 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting (BMSB)

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Programmable Accelerators for Reconfigurable Video Decoder

Cited by 1 publication

References 9 publications

Power aware mapping of an RVC encoder on a many-core platform

Power aware mapping of an RVC encoder on a many-core platform

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