Programming and Runtime Support to Blaze FPGA Accelerator Deployment at Datacenter Scale

Huang, Muhuan; Wu, Di; Yu, Cody Hao; Fang, Zhenman; Interlandi, Matteo; Condie, Tyson; Cong, Jason

doi:10.1145/2987550.2987569

Cited by 73 publications

(33 citation statements)

References 31 publications

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“…Some works [7]- [9] integrate FPGAs into the OpenStack system, while Blaze [10] focuses on accelerating big data processing platforms such as Hadoop YARN and Apache Spark. For the FPGA virtualization, most works [7]- [9] partition an FPGA into several pre-defined partial reconfiguration (PR) regions to implement accelerators.…”

Section: Accelerator Deployment On the Cloudmentioning

confidence: 99%

“…However, because the sizes of pre-defined PR regions cannot always fit requested accelerator, an efficient full reconfiguration mechanism of the entire FPGA is necessary, which is not discussed in these works. For accelerator scheduling, an accelerator-centric scheduling method is implemented in Blaze [10], which suggests arranging tasks requiring the same accelerator on the same FPGA-enabled server to avoid reconfiguration overhead. However, FPGA virtualization for resource utilization improvement is not considered in this…”

Section: Accelerator Deployment On the Cloudmentioning

confidence: 99%

“…The hCODE performs scheduling and configures granted FPGAs, then returns granted server and channel list to the resource manager. At last, the YARN scheduler tags accelerator information on server's labels and performs the final label based scheduling that proposed in [10]. The hCODE has low dependency on the SW scheduling system, therefore it can be easily integrated to current SW platforms.…”

Section: Hcode With Sw Frameworkmentioning

confidence: 99%

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Enabling FPGA-as-a-Service in the Cloud with hCODE Platform

Zhao

Amagasaki

Iida

et al. 2018

IEICE Trans. Inf. & Syst.

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SUMMARY Major cloud service providers, including Amazon and Microsoft, have started employing field-programmable gate arrays (FPGAs) to build high-performance and low-power-consumption cloud capability. However, utilizing an FPGA-enabled cloud is still challenging because of two main reasons. First, the introduction of software and hardware codesign leads to high development complexity. Second, FPGA virtualization and accelerator scheduling techniques are not fully researched for cluster deployment. In this paper, we propose an open-source FPGA-as-a-service (FaaS) platform, the hCODE, to simplify the design, management and deployment of FPGA accelerators at cluster scale. The proposed platform implements a Shell-and-IP design pattern and an open accelerator repository to reduce design and management costs of FPGA projects. Efficient FPGA virtualization and accelerator scheduling techniques are proposed to deploy accelerators on the FPGA-enabled cluster easily. With the proposed hCODE, hardware designers and accelerator users can be organized on one platform to efficiently build open-hardware ecosystem. key words: FPGA-as-a-service, hardware acceleration, open-source hardware

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Section: Accelerator Deployment On the Cloudmentioning

confidence: 99%

Section: Accelerator Deployment On the Cloudmentioning

confidence: 99%

Section: Hcode With Sw Frameworkmentioning

confidence: 99%

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Enabling FPGA-as-a-Service in the Cloud with hCODE Platform

Zhao

Amagasaki

Iida

et al. 2018

IEICE Trans. Inf. & Syst.

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“…Compared to our proposal, this extension focuses on embedded heterogeneous architectures such as the Zynq from Xilinx integrating a CPU and an FPGA on the same die. Blaze [8] provides programming and runtime support that enables rapid and efficient deployment of FPGA accelerators at warehouse scale. It builds upon Apache Spark, a widely used framework for writing Big Data processing applications.…”

Section: Related Workmentioning

confidence: 99%

An FPGA target for the StarPU heterogeneous runtime system

Christodoulis

Broquedis

Müller

et al. 2018

2018 13th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)

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Abstract-Heterogeneity in HPC nodes appears as a promising solution to improve the execution of a wide range of scientific applications, regarding both performance and energy consumption. Unlike CPUs and GPUs, FPGAs can be configured to fit the application needs, making them an appealing target to extend traditional heterogeneous HPC architectures. However, exploiting them requires an in-depth knowledge of low-level hardware and high expertise on vendor-provided tools, which should not be the primary concern of HPC application programmers. In this paper, we present the first results of the HEAVEN project that aims at designing a framework enabling a more straightforward development of scientific applications over FPGA enhanced platforms. Our work is concentrated on providing a framework, which will require the minimum knowledge of the underlying architecture, as well as fewer changes to the existing code. To fulfill these requirements, we extend the StarPU task programming library that initially targets heterogeneous architectures to support FPGA. We use Vivado HLS, a high-level synthesis tool to deliver efficient hardware implementations of the tasks from high-level languages like C/C++. For the evaluation of our proposal, we present code snippets for a blocking version of matrix multiplication, illustrating the ease of development our approach delivers. We also show preliminary results regarding the performance of the FPGA version, which validate our proofof-concept implementation.

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“…While it may be unrealistic to rewrite platforms like Spark in a faster language, a more viable approach to mitigate its poor performance is to accelerate the computations while still working within the Java-based framework. [16][17][18] Chen et al 16 present an example use-case of FPGAs in a Spark framework by implementing a next-generation DNA sequencing application, achieving a modest 2.6-fold speedup. An important feature of our approach is that the use of FPGAs is completely transparent to the user through the use of library functions, which is a common way by which users access functions provided by Spark.…”

mentioning

confidence: 99%

Accelerating Apache Spark with FPGAs

Ghasemi

Chow

2017

Concurrency and Computation

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Apache Spark has become one of the most popular engines for big data processing. Spark provides a platform-independent, high-abstraction programming paradigm for large-scale data processing by leveraging the Java framework. Though it provides software portability across various machines, Java also limits the performance of distributed environments, such as Spark. While it may be unrealistic to rewrite platforms like Spark in a faster language, a more viable approach to mitigate its poor performance is to accelerate the computations while still working within the Java-based framework. This paper demonstrates the feasibility of incorporating Field-Programmable Gate Array (FPGA) acceleration into Spark and presents the performance benefits and bottlenecks of our FPGA-accelerated Spark environment using a MapReduce implementation of the k-means clustering algorithm, to show that acceleration is possible even when using a hardware platform that is not well optimized for performance. An important feature of our approach is that the use of FPGAs is completely transparent to the user through the use of library functions, which is a common way by which users access functions provided by Spark. Power users can further develop other computations using high-level synthesis. KEYWORDSApache Spark, big data, FPGA, high-level synthesis, Java, MapReduce INTRODUCTIONApache Spark 1 is one of the mainstream platforms for large-scale data computation in distributed computing. Built on a Java framework, Spark aims to create a platform-independent, high-abstraction programming paradigm, making large-scale application development easier while handling scalability-related issues, such as task scheduling and data distribution. Although Spark's framework provides high portability and ease-of-use for application developers, using Java creates enormous performance bottlenecks, especially for compute-intensive applications. To improve Spark performance, it is necessary to mitigate the handicap of using Java by introducing the ability to do high-performance computations while maintaining the easy application development provided by Java. In addition, given the already widespread adoption of Spark, it is important to preserve and maintain compatibility to the current Spark programming framework. Field-Programmable Gate Arrays (FPGAs) are integrated circuits with programmable logic blocks and interconnects that can be configured to implement any digital circuit. Due to their reprogrammbility, FPGAs can be used to implement a variety of different applications in a computing environment. In addition to providing programmable blocks to build basic hardware logic functions, FPGAs also contain embedded blocks of memory and Digital Signal Processing (DSP) units. The DSP units can be used to efficiently implement many arithmetic operations, such as integer and floating-point multiplications. 2 Developers can use FPGAs to implement custom hardware circuits to accelerate algorithms with dedicated computing circuits that typically leverage various forms o...

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Programming and Runtime Support to Blaze FPGA Accelerator Deployment at Datacenter Scale

Cited by 73 publications

References 31 publications

Enabling FPGA-as-a-Service in the Cloud with hCODE Platform

Enabling FPGA-as-a-Service in the Cloud with hCODE Platform

An FPGA target for the StarPU heterogeneous runtime system

Accelerating Apache Spark with FPGAs

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