QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips

Abstract

True random number generators (TRNG) sample random physical processes to create large amounts of random numbers for various use cases, including security-critical cryptographic primitives, scienti c simulations, machine learning applications, and even recreational entertainment. Unfortunately, not every computing system is equipped with dedicated TRNG hardware, limiting the application space and security guarantees for such systems. To open the application space and enable security guarantees for the overwhelming majority of computing systems that do not necessarily have dedicated TRNG hardware (e.g., processing-in-memory systems), we develop QUAC-TRNG, a new high-throughput TRNG that can be fully implemented in commodity DRAM chips, which are key components in most modern systems.QUAC-TRNG exploits the new observation that a carefullyengineered sequence of DRAM commands activates four consecutive DRAM rows in rapid succession. This QUadruple ACtivation (QUAC) causes the bitline sense ampli ers to nondeterministically converge to random values when we activate four rows that store con icting data because the net deviation in bitline voltage fails to meet reliable sensing margins.We experimentally demonstrate that QUAC reliably generates random values across 136 commodity DDR4 DRAM chips from one major DRAM manufacturer. We describe how to develop an e ective TRNG (QUAC-TRNG) based on QUAC. We evaluate the quality of our TRNG using the commonly-used NIST statistical test suite for randomness and nd that QUAC-TRNG successfully passes each test. Our experimental evaluations show that QUAC-TRNG reliably generates true random numbers with a throughput of 3.44 Gb/s (per DRAM channel), outperforming the state-of-the-art DRAM-based TRNG by 15.08× and 1.41× for basic and throughput-optimized versions, respectively. We show that QUAC-TRNG utilizes DRAM bandwidth better than the state-of-the-art, achieving up to 2.03× the throughput of a throughput-optimized baseline when scaling bus frequencies to 12 GT/s.

DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators

“…To evaluate DR-STRaNGe's performance and fairness, we use a modified version of Ramulator [1,92], a cycle-accurate DRAM simulator, that can simulate two state-of-the-art DRAMbased TRNG mechanisms (i.e., D-RaNGe [82] and QUAC-TRNG [138]). We extend the core model of Ramulator to support random number requests.…”

“…We simulate 6 different DRAM-based TRNG mechanisms with different TRNG throughput values ranging from 200 Mb/s to 6.4 Gb/s. Note that two state-of-the-art DRAM-based TRNGs, D-RaNGe [82] and QUAC-TRNG [138], can provide ∼563Mb/s and ∼3.44Gb/s average random number throughput, respectively, given a stateof-the-art system configuration [138]. 1 We evaluate 43 two-core multi-programmed workloads, each consisting of one RNG and one non-RNG application.…”

“…DR-STRaNGe improves performance of non-RNG applications, system fairness, and energy by 17.9%, 32.1%, and 21%, respectively, compared to the commonly-used baseline memory request scheduler design. • We evaluate DR-STRaNGe using two state-of-the-art DRAMbased TRNG mechanisms: D-RaNGe [82] and QUAC-TRNG [138]. We show that DR-STRaNGe is compatible with these mechanisms and improves system performance, fairness and energy with both TRNG mechanisms.…”

“…DRAM is widely available in almost all computer systems and can be easily integrated into mobile and IoT devices as main memory. To enable low-cost and high-throughput true random number generation in almost all commodity systems and emerging processing-in-memory (PIM) architectures, prior works [11,44,60,78,82,138,166,168] propose various DRAM-based TRNGs that exploit manufacturing process variations in DRAM and the resulting entropy to generate true random numbers. However, no prior work provides an end-to-end system design to enable DRAM-based true random number generation in real systems.…”

“…DRAM-based True Random Number Generators. Prior research proposes various DRAM-based TRNGs that leverage the randomness in DRAM timing failures [11,82,138], retention failures [60,78,166] and start-up values [44,168].…”