2022
DOI: 10.1109/tdmr.2022.3175324
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Quadruple and Sextuple Cross-Coupled SRAM Cell Designs With Optimized Overhead for Reliable Applications

Abstract: and S8P4N, the QCCS cell reduces read access time by 17%, write access time by 19%, power dissipation by 4% and silicon area overhead by 10% on average, while the SCCS cell reduces read access time by 44% as well as write access time by 13% on average at the cost of moderate increase in power dissipation and silicon area overhead.

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Cited by 40 publications
(17 citation statements)
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“…Noted that the scheme in this section includes an optimization problem. The optimization model contains objective function [23][24][25][26][27][28][29][30][31][32][33], and it includes constraints [34][35][36][37][38][39][40][41][42][43][44]. To implement this problem on network, it is needed to uses smart devices [45][46][47][48][49][50] and Telecommunication equipment [51][52][53][54][55].…”
Section: Formulation Of the Schemementioning
confidence: 99%
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“…Noted that the scheme in this section includes an optimization problem. The optimization model contains objective function [23][24][25][26][27][28][29][30][31][32][33], and it includes constraints [34][35][36][37][38][39][40][41][42][43][44]. To implement this problem on network, it is needed to uses smart devices [45][46][47][48][49][50] and Telecommunication equipment [51][52][53][54][55].…”
Section: Formulation Of the Schemementioning
confidence: 99%
“…In these constraints, the binary variable x is used to prevent simultaneous charging and discharging of EVs. The limitations of the apparent power and the harmonic current passing through the AC/DC converter in the electric spring are considered in (24) and (25), respectively. As mentioned, there is a non-critical load in the output of the IUEE that can play an effective role in regulating ADN voltage by changing its internal characteristics [15].…”
Section: Operation Model Of the Iueementioning
confidence: 99%
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“…If the energy particle hits the storage node "Q" (as shown in Figure 15), the stored value at node "Q" ("1") changes to "0". 13 In this case, P7 turns on, while N2 turns off for a brief period. Since transistors P3 and P4 are in series with P7 and are strong transistors, the maximum voltage drop occurs at the source of P7 (at node 'S').…”
Section: Flip and Recoverymentioning
confidence: 99%
“…Nevertheless, using too many PMOS transistors makes the cell more susceptible to SEU. Yan et al 19 proposed the QCCS12T cell and its reliability‐improved version, the SCCS18T cell, where the QCCS12T cell can only tolerate SEU and the SCCS18T cell can tolerate partial SEDNUs but at a very high cost in terms of power consumption and area.…”
Section: Introductionmentioning
confidence: 99%