Quantitative analysis of very-low-voltage testing

Abstract

Abstract

Detecting delay flaws by very-low-voltage testing

“…Figure 3 shows that the changing rate of the propagation delay remains almost unchanged when the supply voltage is higher than 4V t . It starts increasing significantly when the supply voltage is reduced to about 2V t to 2.5V t , which is the same as the voltage range for VLV testing suggested in [2]. Tables 3 and 4 list the delay ratios between WD and fault-free gates at different voltages for the 0.8 µm and 0.6 µm technologies.…”

“…Also, Hao and McCluskey have shown that VLV testing is effective in detecting threshold voltage shifts [1]. We will verify the supply voltage for VLV testing proposed in [2] is valid for detecting these timing failures too.…”

“…Although VLV testing can detect more flaws as the supply voltage is reduced, the test time becomes much longer and noise margin reduces seriously if the supply voltage is further reduced to a small voltage [2]. Also, fault-free circuits should be still functional at the selected voltage.…”

“…A circuit has a delay flaw (non-operational delay fault) if there is a timing failure but the circuit continues to work at the designed speed [6] [7]. Flaw coverage of a delay flaw is the range of the attribute of a flaw that can be detected by a test, such as the range of the resistance of a short that can be detected by a test [2]. We will first discuss the failure…”

“…In this paper, we will discuss how VLV testing can improve the detectability of timing failures that are caused by degraded signals and transistors with lower driving capabilities. Gate oxide shorts and metal shorts have been discussed in [2]. Defective buffers in long interconnects can have the same defects that occur in logic gates.…”